LMH6504 Datasheet, PDF (19/29 Pages) National Semiconductor (TI) – Wideband, Low Power, Variable Gain Amplifier

LMH6504
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AUTOMATIC GAIN CONTROL (AGC) #1
SNOSA96D – NOVEMBER 2003 – REVISED MARCH 2013
Fast Response AGC Loop
The AGC circuit shown in Figure 49 will correct a 6 dB input amplitude step in 100 ns. The circuit includes a two
op-amp precision rectifier amplitude detector (U1 and U2), and an integrator (U3) to provide high loop gain at low
frequencies. The output amplitude is set by R₉. Some notes on building fast AGC loops: Precision rectifiers work
best with large output signals. Accuracy is improved by blocking DC offsets, as shown in Figure 49.
INCLUDES SCOPE
PROBE CAPACITANCE
C₃
40 pF
R₁₀
500:
C₂
680 pF
-
U3
LMH6609
+
V_IN
R_G
100:
2
1
+
U4
6
LMH6504
-
3
4
7
R_F
R₈
500:
R₉
4.22 k:
-5V
+
U2
LMH6714
-
R₇
300:
R₅
R₃
25:
300:
R₆
300:
1N5712
SCHOTTKY
R₄
300:
-
U1
LMH6714
+
OUTPUT
20 MHz,
0.1 V_PP
C₁
1.0 µF
R₁
20:
R₂
25:
Figure 49. Automatic Gain Control Circuit #1
Signal frequencies must not reach the gain control port of the LMH6504, or the output signal will be distorted
(modulated by itself). A fast settling AGC needs additional filtering beyond the integrator stage to block signal
frequencies. This is provided in Figure 49 by a simple R-C filter (R₁₀ and C₃); better distortion performance can
be achieved with a more complex filter. These filters should be scaled with the input signal frequency. Loops with
slower response time (longer integration time constants) may not need the R₁₀ – C₃ filter.
Checking the loop stability can be done by monitoring the V_G voltage while applying a step change in input signal
amplitude. Changing the input signal amplitude can be easily done with an arbitrary waveform generator.
AUTOMATIC GAIN CONTROL (AGC) #2
Figure 50 illustrates an automatic gain control circuit that employs two LMH6504’s. In this circuit, U1 receives the
input signal and produces an output signal of constant amplitude. U2 is configured to provide negative feedback.
U2 generates a rectified gain control signal that works against an adjustable bias level which may be set by the
potentiometer and R_B. C_I integrates the bias and negative feedback. The resultant gain control signal is applied
to the U1 gain control input V_G. The bias adjustment allows the U1 output to be set at an arbitrary level less than
the maximum output specification of the amplifier. Rectification is accomplished in U2 by driving both the
amplifier input and the gain control input with the U1 output signal. The voltage divider that is formed by R₁ and
R₂, sets the rectifier gain.
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