DRV2625 Datasheet, PDF (19/77 Pages) Texas Instruments – DRV2625 Ultra Low Power Closed-Loop LRA/ERM Haptic Driver with Built-In Library

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DRV2625
SLOS879A – DECEMBER 2015 – REVISED DECEMBER 2015
OVER_TEMP is flagged if the junction temperature goes above the thermal threshold during a process execution
(such as waveform playback, diagnostics or auto-calibration).
UVLO is flagged if VDD drops below the VDD_THRES voltage during a process execution (such as waveform
playback, diagnostics or auto-calibration).
PROCESS_DONE is flagged when the process (waveform sequencer, diagnostics or calibration) finishes. The
PROCESS_DONE bit does not assert if the process is interrupted (such as with a stop trigger or by a critical
condition). Note that RTP will never cause the PROCESS_DONE to assert because RTP never finishes on its
own.
PRG_ERROR is flagged if the data read in the RAM is corrupted.
PRG_ERROR
INTERRUPT_MASK[4]
PROCESS_DONE
INTERRUPT_MASK[3]
UVLO
INTERRUPT_MASK[2]
OVER_TEMP
INTERRUPT_MASK[1]
OC_DETECT
INTERRUPT_MASK[0]
SQ
INTZ_REG_READ _{R Q}
TRIG/INTZ
Figure 21. TRIG/INTZ Functionality in Interrupt Mode
Critical conditions, such as UVLO, over-temperature or over-current will not be monitored while the device is in
standby state. However, UVLO and over-temperature conditions will be monitored during I²C communication is
ongoing, even if the device is in standby state.
8.3.17 Automatic Transition to Standby State
The DRV2625 allows for automatic transition to standby state to preserve power. If the device goes into standby
and a new waveform is triggered, the DRV2625 will wake-up and immediately play the requested waveform.
8.3.18 Automatic Brake into Standby
The DRV2625 allows for automatic braking before going into standby. If the AUTO_BRK_INTO_STBY is
asserted, the device will brake the actuator (if necessary) before going into standby. This functionality will be
bypassed in the event of a critical condition, such as over-temperature, over-current, UVLO, and NRST
assertion.
8.3.19 Battery Monitoring and Power Preservation
The DRV2625 device continuously monitors the VDD voltage. In the event of a VDD voltage glitch that goes
below the UVLO_THRES[2:0] voltage, the DRV2625 immediately stops any playback and goes into standby
state. The UVLO status bit will assert and, if configured, the TRIG/INTZ pin will be asserted. Note that going into
standby due to a VDD glitch will bypass any braking, even if AUTO_BRK_INTO_STBY is enabled. I²C
communication will not be interrupted if a UVLO condition happens. However, because a UVLO condition could
potentially corrupt such communication, TI recommends checking the UVLO flag after I²C transactions as a way
to verify that the content was not corrupted in the process.
The DRV2625 also features a battery preservation mode that monitors the battery, and if VDD voltage drops
below a specified threshold (see BAT_LIFE_EXT_LVL1[7:0] and BAT_LIFE_EXT_LVL2[7:0] parameters) will
automatically clamp the maximum output voltage, as specified by the user (see OD_CLAMP_LVL1[7:0] and
OD_CLAMP_LVL2[7:0] parameters).
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