TDA2HA-17 Datasheet, PDF (184/380 Pages) Texas Instruments – TDA2x ADAS Applications Processor 17mm Package (AAS Package) Silicon Revision 2.0

TDA2HA-17, TDA2HG-17
SPRS952A – DECEMBER 2015 – REVISED APRIL 2016
www.ti.com
Table 7-9. Manual Functions Mapping for VIP2 (continued)
BAL BALL NAME
VIP2_MANUAL 1
VIP2_MANUAL2
CFG REGISTER
MUXMODE
L
A_DELAY
G_DELAY
A_DELAY
G_DELAY
2
4
5
6
(ps)
(ps)
(ps)
(ps)
E14
vout1_d21
2039
450
2350
384
CFG_VOUT1_D21_IN
-
vin3a_d5
-
-
D14
vout1_d22
2037
583
2369
497
CFG_VOUT1_D22_IN
-
vin3a_d6
-
-
D11
vout1_d23
1768
740
2246
508
CFG_VOUT1_D23_IN
-
vin3a_d7
-
-
C9
vout1_d3
2099
881
2382
844
CFG_VOUT1_D3_IN
-
vin3a_d19
-
-
A13
vout1_d4
2120
786
2387
756
CFG_VOUT1_D4_IN
-
vin3a_d20
-
-
A12
vout1_d5
1965
857
2299
769
CFG_VOUT1_D5_IN
-
vin3a_d21
-
-
B14
vout1_d6
2139
680
2366
699
CFG_VOUT1_D6_IN
-
vin3a_d22
-
-
B13
vout1_d7
2122
912
2360
920
CFG_VOUT1_D7_IN
-
vin3a_d23
-
-
A14
vout1_d8
2073
906
2372
853
CFG_VOUT1_D8_IN
-
vin3a_d8
-
-
B11
vout1_d9
2097
934
2386
879
CFG_VOUT1_D9_IN
-
vin3a_d9
-
-
D13
vout1_de
2021
527
2366
428
CFG_VOUT1_DE_IN
-
vin3a_de0
-
-
E11
vout1_fld
0
0
0
0
CFG_VOUT1_FLD_IN
-
vin3a_clk0
-
-
E12 vout1_hsync
1775
486
2272
164
CFG_VOUT1_HSYNC_IN
-
vin3a_hsync0
-
-
E13 vout1_vsync
1917
314
2301
0
CFG_VOUT1_VSYNC_IN
-
vin3a_vsync0
-
-
Manual IO Timings Modes must be used to guarantee some IO timings for VIP2. See Table 7-2 Modes Summary for a list of IO timings requiring
the use of Manual IO Timings Modes. See Table 7-10 Manual Functions Mapping for VIP2 4B for a definition of the Manual modes.
Table 7-10 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
BALL
N3
P3
M6
N5
L5
P1
P2
N2
N1
M5
BALL NAME
gpmc_a0
gpmc_a1
gpmc_a10
gpmc_a11
gpmc_a12
gpmc_a2
gpmc_a3
gpmc_a4
gpmc_a5
gpmc_a6
Table 7-10. Manual Functions Mapping for VIP2 4B
VIP2_4B_MANUAL1
A_DELAY (ps) G_DELAY (ps)
1861
901
1652
891
0
0
1783
1178
1903
853
1888
1212
1839
1274
1868
1113
1757
1079
1800
670
VIP2_4B_MANUAL2
A_DELAY (ps) G_DELAY (ps)
2102
660
1955
583
0
0
1975
1021
2076
664
2065
994
2025
1075
2058
869
2028
802
2032
421
CFG REGISTER
CFG_GPMC_A0_IN
CFG_GPMC_A1_IN
CFG_GPMC_A10_IN
CFG_GPMC_A11_IN
CFG_GPMC_A12_IN
CFG_GPMC_A2_IN
CFG_GPMC_A3_IN
CFG_GPMC_A4_IN
CFG_GPMC_A5_IN
CFG_GPMC_A6_IN
MUXMODE
5
6
-
vin4b_d0
-
vin4b_d1
-
vin4b_clk1
-
vin4b_de1
-
vin4b_fld1
-
vin4b_d2
-
vin4b_d3
-
vin4b_d4
-
vin4b_d5
-
vin4b_d6
184 Timing Requirements and Switching Characteristics
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