TMS570LS1114_14 Datasheet, PDF (18/167 Pages) Texas Instruments – 16- and 32-Bit RISC Flash Microcontroller

TMS570LS1114
SPNS188A – OCTOBER 2012 – REVISED SEPTEMBER 2013
www.ti.com
Table 2-12. PGE Multi-Buffered Serial Peripheral Interface Modules (MibSPI) (continued)
Terminal
Signal Name
MIBSPI3CLK/AWM1_EXT_SEL[1]/EQEP1A
MIBSPI3NCS[0]/AD2EVT/GIOB[2]/EQEP1I/N2HET2_PIN_nD
IS
MIBSPI3NCS[1]/N2HET1[25]/MDCLK
MIBSPI3NCS[2]/I2C_SDA/N2HET1[27]/nTZ2
MIBSPI3NCS[3]/I2C_SCL/N2HET1[29]/nTZ1
N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]/EPWM1SYNCO
MIBSPI3NENA /MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
MIBSPI3SIMO[0]/AWM1_EXT_SEL[0]/ECAP3
MIBSPI3SOMI[0]/AWM1_EXT_ENA/ECAP2
144
PGE
53
55
37
4
3
6
54
54
52
51
Signal Default
Type Pull State
Pull Type
Description
I/O
Pull Up Programmable, MibSPI3 clock, or GPIO
20 µA
MibSPI3 chip select, or
GPIO
Pull Down
Pull Up
Programmable, MibSPI3 chip select, or
20 µA
GPIO
Programmable, MibSPI3 chip select, or
20 µA
GPIO
MibSPI3 enable, or GPIO
MibSPI3 slave-in master-
out, or GPIO
MibSPI3 slave-out master-
in, or GPIO
MIBSPI5CLK
MIBSPI5NCS[0]/EPWM4A
MIBSPI5NENA/MIBSPI5SOMI[1]/ECAP5
MIBSPI5SIMO[0]/MIBSPI5SOMI[2]
MIBSPI5SOMI[0]
MIBSPI5NENA/MIBSPI5SOMI[1]/ECAP5
MIBSPI5SIMO[0]/MIBSPI5SOMI[2]
100
I/O
Pull Up Programmable, MibSPI5 clock, or GPIO
32
20 µA
MibSPI5 chip select, or
GPIO
97
MibSPI5 enable, or GPIO
99
MibSPI5 slave-in master-
out, or GPIO
98
MibSPI5 slave-out master-
in, or GPIO
97
MibSPI5 slave-out master-
in, or GPIO
99
MibSPI5 slave-out master-
in, or GPIO
2.3.1.13 System Module Interface
nPORRST
Table 2-13. PGE System Module Interface
Terminal
Signal Name
144
PGE
46
Signal Default
Type Pull State
Input Pull Down
Pull Type
100 µA
Description
Power-on reset, cold reset
External power supply
monitor circuitry must
drive nPORRST low when
any of the supplies to the
microcontroller fall out of
thespecified range. This
terminal has a glitch filter.
See Section 4.8.
18
Device Package and Terminal Functions
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