TCA9534_16 Datasheet, PDF (18/38 Pages) Texas Instruments – Low Voltage 8-Bit I2C and SMBUS Low-Power I/O Expander with Interrupt Output and Configuration Registers

TCA9534
SCPS197B – SEPTEMBER 2014 – REVISED NOVEMBER 2016
8.6 Register Maps
8.6.1 Device Address
Figure 26 shows the address byte of the TCA9534.
Slave Address
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0 1 0 0 A2 A1 A0 R/W
Fixed
Hardware
Selectable
Figure 26. TCA9534 Address
Table 2 shows the TCA9534 address reference.
Table 2. Address Reference
INPUTS
A2
A1
A0
L
L
L
L
L
H
L
H
L
L
H
H
H
L
L
H
L
H
H
H
L
H
H
H
I²C BUS SLAVE ADDRESS
32 (decimal), 20 (hexadecimal)
33 (decimal), 21 (hexadecimal)
34 (decimal), 22 (hexadecimal)
35 (decimal), 23 (hexadecimal)
36 (decimal), 24 (hexadecimal)
37 (decimal), 25 (hexadecimal)
38 (decimal), 26 (hexadecimal)
39 (decimal), 27 (hexadecimal)
The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read
is selected, while a low (0) selects a write operation.
8.6.2 Control Register and Command Byte
Following the successful Acknowledgment of the address byte, the bus master sends a command byte that is
stored in the control register in the TCA9534 (see Figure 27). Two bits of this command byte state the operation
(read or write) and the internal register (input, output, polarity inversion or configuration) that is affected. This
register can be written or read through the I²C bus. The command byte is sent only during a write transmission.
Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a
new command byte has been sent.
0 0 0 0 0 B2 B1 B0
Figure 27. Control Register Bits
Table 3 shows the TCA9534 command byte.
CONTROL REGISTER BITS
B1
B0
0
0
0
1
1
0
1
1
Table 3. Command Byte Table
COMMAND BYTE
(HEX)
0×00
0×01
0×02
0×03
REGISTER
Input Port
Output Port
Polarity Inversion
Configuration
PROTOCOL
Read byte
Read/write byte
Read/write byte
Read/write byte
POWER-UP DEFAULT
XXXX XXXX
1111 1111
0000 0000
1111 1111
18
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