TCA9534_16 Datasheet, PDF (16/38 Pages) Texas Instruments – Low Voltage 8-Bit I2C and SMBUS Low-Power I/O Expander with Interrupt Output and Configuration Registers

TCA9534
SCPS197B – SEPTEMBER 2014 – REVISED NOVEMBER 2016
www.ti.com
8.3 Feature Description
8.3.1 I/O Port
When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a high-impedance input. The input
voltage may be raised above V_CC to a maximum of 5.5 V.
If the I/O is configured as an output, Q1 or Q2 is enabled depending on the state of the output port register. In
this case, there are low impedance paths between the I/O pin and either V_CC or GND. The external voltage
applied to this I/O pin must not exceed the recommended levels for proper operation.
8.3.2 Interrupt Output (INT)
An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After time, t_iv, the
signal INT is valid. Resetting the interrupt circuit is achieved when data on the port is changed to the original
setting or data is read from the port that generated the interrupt. Resetting occurs in the read mode at the
acknowledge (ACK) bit after the rising edge of the SCL signal. Note that the INT is reset at the ACK just before
the byte of changed data is sent. Interrupts that occur during the ACK clock pulse can be lost (or be very short)
because of the resetting of the interrupt during this pulse. Each change of the I/Os after resetting is detected and
is transmitted as INT.
Reading from or writing to another device does not affect the interrupt circuit, and a pin configured as an output
cannot cause an interrupt. Changing an I/O from an output to an input may cause a false interrupt to occur if the
state of the pin does not match the contents of the Input Port register.
The INT output has an open-drain structure and requires pull-up resistor to V_CC.
8.4 Device Functional Modes
8.4.1 Power-On Reset
When power (from 0 V) is applied to VCC, an internal power-on reset holds the TCA9534 in a reset condition
until V_CC has reached V_PORR. At that point, the reset condition is released and the TCA9534 registers and
SMBus/I²C state machine initializes to their default states. After that, V_CC must be lowered to below V_PORF and
then back up to the operating voltage for a power-on reset cycle.
8.5 Programming
8.5.1 I²C Interface
The TCA9534 has a standard bidirectional I²C interface that is controlled by a master device in order to be
configured or read the status of this device. Each slave on the I²C bus has a specific device address to
differentiate between other slave devices that are on the same I²C bus. Many slave devices require configuration
upon startup to set the behavior of the device. This is typically done when the master accesses internal register
maps of the slave, which have unique register addresses. A device can have one or multiple registers where
data is stored, written, or read. For more information see the Understanding the I²C Bus application report.
The physical I²C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines
must be connected to V_CC through a pull-up resistor. The size of the pull-up resistor is determined by the amount
of capacitance on the I²C lines. For further details, see the I²C Pull-up Resistor Calculation application report.
Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are
high after a STOP condition.
Figure 24 and Figure 25 show the general procedure for a master to access a slave device:
1. If a master wants to send data to a slave:
– Master-transmitter sends a START condition and addresses the slave-receiver.
– Master-transmitter sends data to slave-receiver.
– Master-transmitter terminates the transfer with a STOP condition.
2. If a master wants to receive or read data from a slave:
– Master-receiver sends a START condition and addresses the slave-transmitter.
– Master-receiver sends the requested register to read to slave-transmitter.
– Master-receiver receives data from the slave-transmitter.
16
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
Product Folder Links: TCA9534