TM4C1294NCPDT Datasheet, PDF (161/1890 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1294NCPDT Microcontroller
Register 40: Interrupt 64-67 Priority (PRI16), offset 0x440
Register 41: Interrupt 68-71 Priority (PRI17), offset 0x444
Register 42: Interrupt 72-75 Priority (PRI18), offset 0x448
Register 43: Interrupt 76-79 Priority (PRI19), offset 0x44C
Register 44: Interrupt 80-83 Priority (PRI20), offset 0x450
Register 45: Interrupt 84-87 Priority (PRI21), offset 0x454
Register 46: Interrupt 88-91 Priority (PRI22), offset 0x458
Register 47: Interrupt 92-95 Priority (PRI23), offset 0x45C
Register 48: Interrupt 96-99 Priority (PRI24), offset 0x460
Register 49: Interrupt 100-103 Priority (PRI25), offset 0x464
Register 50: Interrupt 104-107 Priority (PRI26), offset 0x468
Register 51: Interrupt 108-111 Priority (PRI27), offset 0x46C
Register 52: Interrupt 112-113 Priority (PRI28), offset 0x470
Note: This register can only be accessed from privileged mode.
The PRIn registers (see also page 159) provide 3-bit priority fields for each interrupt. These registers
are byte accessible. Each register holds four priority fields that are assigned to interrupts as follows:
PRIn Register Bit Field
Bits 31:29
Bits 23:21
Bits 15:13
Bits 7:5
Interrupt
Interrupt [4n+3]
Interrupt [4n+2]
Interrupt [4n+1]
Interrupt [4n]
See Table 2-9 on page 116 for interrupt assignments.
Each priority level can be split into separate group priority and subpriority fields. The PRIGROUP
field in the Application Interrupt and Reset Control (APINT) register (see page 171) indicates the
position of the binary point that splits the priority and subpriority fields .
These registers can only be accessed from privileged mode.
Note: Because the last interrupt vector is number 113, bits [31:16] of the PRI28 register are
reserved.
June 18, 2014
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