CC2560A_16 Datasheet, PDF (16/51 Pages) Texas Instruments – Dual-Mode Bluetooth Controller

CC2560A NRND; CC2564 NRND
CC2560A, CC2560B, CC2564, CC2564B
SWRS121E – JULY 2012 – REVISED JANUARY 2016
Table 5-4. Data Frame Key
SYMBOL
STR
D0...Dn
PAR
STP
DESCRIPTION
Start bit
Data bits (LSB first)
Parity bit (optional)
Stop bit
5.7.3.2 PCM
Figure 5-4 shows the interface timing for the PCM.
T_clk
T_w
T_w
AUD_CLK
t_is
t_ih
AUD_IN / FSYNC_IN
t_op
AUD_OUT / FSYNC_OUT
Figure 5-4. PCM Interface Timing
Table 5-5 lists the associated PCM master parameters.
Symbol
T_clk
Cycle time
PARAMETER
Table 5-5. PCM Master
CONDITION
T_w
High or low pulse width
t_is
AUD_IN setup time
t_ih
AUD_IN hold time
t_op
AUD_OUT propagation time
t_op
FSYNC_OUT propagation time
40-pF load
40-pF load
Table 5-6 lists the associated PCM slave parameters.
MIN
244.14
(4.096 MHz)
50% of T_clk min
25
0
0
0
SYMBOL
T_clk
Cycle time
PARAMETER
T_w
High or low pulse width
T_is
AUD_IN setup time
T_ih
AUD_IN hold time
t_is
AUD_FSYNC setup time
t_ih
AUD_FSYNC hold time
t_op
AUD_OUT propagation time
Table 5-6. PCM Slave
CONDITION
40-pF load
MIN
66.67
(15 MHz)
40% of T_clk
8
0
8
0
0
www.ti.com
td_aud_swrs064
MAX
15625
(64 kHz)
10
10
UNIT
ns
ns
ns
ns
ns
ns
MAX
21
UNIT
ns
ns
ns
ns
ns
ns
ns
16
Specifications
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