TMS320F280049M Datasheet, PDF (156/214 Pages) Texas Instruments – Piccolo Microcontrollers

TMS320F280049M
SPRS945 – JANUARY 2017
www.ti.com
5.11.5.1.2 Master Mode External Timings Where Clock Phase = 1
Table 5-79 lists the SPI master mode external timings where (SPIBRR + 1) is even or SPIBRR = 0 or 2.
Table 5-80 lists the SPI master mode external timings where (SPIBRR + 1) is odd or SPIBRR > 3.
Figure 5-62 shows the SPI master mode external timing where the clock phase = 1.
Table 5-79. SPI Master Mode: (SPIBRR + 1) is Even or SPIBRR = 0 or 2, Phase = 1
NO.
1
t_c(SPC)M
t_w(SPCH)M
2
t_w(SPCL))M
t_w(SPCL)M
3
t_w(SPCH)M
t_{d(SIMO-SPCH)M}
6
t_{d(SIMO-SPCL)M}
t_{v(SPCH-SIMO)M}
7
t_{v(SPCL-SIMO)M}
t_{su(SOMI-SPCH)M}
10
t_{su(SOMI-SPCL)M}
t_{h(SPCH-SOMI)M}
11
t_{h(SPCL-SOMI)M}
t_d(STE-SPCH)M
23
t_d(STE-SPCL)M
t_d(SPCL-STE)M
24
t_d(SPCH-STE)M
Cycle time, SPICLK
Pulse duration, SPICLK high
(clock polarity = 0)
Pulse duration, SPICLK low
(clock polarity = 1)
Pulse duration, SPICLK low
(clock polarity = 0)
Pulse duration, SPICLK high
(clock polarity = 1)
Delay time, SPISIMO data valid to SPICLK
high (clock polarity = 0)
Delay time, SPISIMO data valid to SPICLK low
(clock polarity = 1)
Valid time, SPISIMO data valid after SPICLK
high (clock polarity = 0)
Valid time, SPISIMO data valid after SPICLK
low (clock polarity = 1)
Setup time, SPISOMI before SPICLK high
(clock polarity = 0)
Setup time, SPISOMI before SPICLK low
(clock polarity = 1)
Hold time, SPISOMI data valid after SPICLK
high (clock polarity = 0)
Hold time, SPISOMI data valid after SPICLK
low (clock polarity = 1)
Delay time, SPISTE low to SPICLK high (clock
polarity = 0)
Delay time, SPISTE low to SPICLK low (clock
polarity = 1)
Delay time, SPICLK low to SPISTE invalid
(clock polarity = 0)
Delay time, SPICLK high to SPISTE invalid
(clock polarity = 1)
MIN
4t_c(LSPCLK)
0.5t_c(SPC)M – 1
0.5t_c(SPC)M – 1
0.5t_c(SPC)M – 1
0.5t_c(SPC)M – 1
0.5t_c(SPC)M – 3
0.5t_c(SPC)M – 3
0.5t_c(SPC)M – 3
0.5t_c(SPC)M – 3
20
20
0
0
0.5t_c(SPC) – 3
0.5t_c(SPC) – 3
0.5t_c(SPC) – 3
0.5t_c(SPC) – 3
MAX
128t_c(LSPCLK)
0.5t_c(SPC)M + 1
0.5t_c(SPC)M + 1
0.5t_c(SPC)M + 1
0.5t_c(SPC)M + 1
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
156 Specifications
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