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TMS320F280049M Datasheet, PDF (1/214 Pages) Texas Instruments – Piccolo Microcontrollers | |||
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TMS320F28004x Piccolo⢠Microcontrollers
TMS320F280049M
SPRS945 â JANUARY 2017
1 Device Overview
1.1 Features
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⢠TMS320C28x 32-Bit CPU
â 100 MHz
â IEEE 754 Single-Precision Floating-Point Unit
(FPU)
â Trigonometric Math Unit (TMU)
â 3Ã-Cycle to 4Ã-Cycle Improvement for
Common Trigonometric Functions Versus
Software Libraries
â 13-Cycle Park Transform
â Viterbi/Complex Math Unit (VCU-I)
⢠Programmable Control Law Accelerator (CLA)
â 100 MHz
â IEEE 754 Single-Precision Floating-Point
Instructions
â Executes Code Independently of Main CPU
⢠On-Chip Memory
â 256KB (128KW) of Flash (ECC-Protected)
Across Two Independent Banks
â 100KB (50KW) of RAM (ECC-Protected or
Parity-Protected)
â Dual-Zone Security Supporting Third-Party
Development
⢠Clock and System Control
â Two Internal Zero-Pin 10-MHz Oscillators
â On-Chip Crystal Oscillator and External Clock
Input
â Windowed Watchdog Timer Module
â Missing Clock Detection Circuitry
⢠1.2-V Core, 3.3-V I/O Design
â Internal VREG or Internal Switching Regulator
for 1.2-V Generation Allows for Single-Supply
Designs
⢠System Peripherals
â 6-Channel Direct Memory Access (DMA)
Controller
â 40 Individually Programmable Multiplexed
General-Purpose Input/Output (GPIO) Pins
â 21 Digital Inputs on ADC Pins
â Enhanced Peripheral Interrupt Expansion (ePIE)
Module
â Multiple Low-Power Mode (LPM) Support With
External Wakeup
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⢠Communications Peripherals
â One Power Management Bus (PMBus) Interface
â One Inter-Integrated Circuit (I2C) Interface
(Pin-Bootable)
â Two Controller Area Network (CAN) Bus Ports
(Pin-Bootable)
â Two Serial Peripheral Interface (SPI) Ports
(Pin-Bootable)
â Two Serial Communication Interfaces (SCIs)
(Pin-Bootable)
â One Local Interconnect Network (LIN)
â One Fast Serial Interface (FSI) With a
Transmitter and Receiver
⢠Analog System
â Three 3.45-MSPS, 12-Bit Analog-to-Digital
Converters (ADCs)
â Up to 21 External Channels
â Hardware-Integrated Post-Processing of ADC
Conversions
â Saturating Offset Calibration
â Error From Set Point Calculation
â High, Low, and Zero Crossing Compare With
Interrupt Capability
â Trigger-to-Sample Delay Capture
â Seven Windowed Comparators (CMPSS) With
12-Bit Reference Digital-to-Analog Converters
(DACs)
â Digital Glitch Filters
â Two 12-Bit Buffered DAC Outputs
â Seven Programmable Gain Amplifiers (PGAs)
(Gain Settings: 3, 6, 12, 24)
⢠Enhanced Control Peripherals
â 16 ePWM Channels With High-Resolution
Capability (150-ps Resolution)
â Integrated Dead-Band Support With High
Resolution
â Integrated Hardware Trip Zones (TZs)
â Seven Enhanced Capture (eCAP) Modules
â Two Enhanced Quadrature Encoder Pulse
(eQEP) Modules With Support for CW/CCW
Operation Modes
â Four Sigma-Delta Filter Module (SDFM) Input
Channels (Two Parallel Filters per Channel)
â Standard SDFM Data Filtering
â Comparator Filter for Fast Action for
Overvalue or Undervalue Condition
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to
change without notice.
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