TMS320DM6437_17 Datasheet, PDF (146/306 Pages) Texas Instruments – Digital Media Processor

TMS320DM6437
Digital Media Processor
SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008
www.ti.com
Table 3-53. EMIFA/VPSS Sub-Block 1 Configuration Choice D⁽¹⁾
MAJOR
CONFIG
OPTION
MINOR
CONFIG
OPTION
PINMUX SELECTION FIELDS
AEM
OTHERS
RESULTING PERIPHERALS/PINS
EMIFA
VPBE
GPIO
Cfg Summary
8-bit EMIFA (NAND)
Pinout Mode 4
No VENC
22-to-26 GP pins
VENCSEL = 0
-
-
0 = GP[31, 29:14]
RGBSEL = 0
0 = EM_A[2:1],
EM_CS2
-
0 = GP[11:10, 7:5]
D1
100 CS3SEL = 0,1
1 = EM_CS3
-
0 = GP[13]
CS4SEL = 0,1
1 = EM_CS4
-
0 = GP[32]
CS5SEL = 0,1
1 = EM_CS5
-
0 = GP[33]
VPBECKEN = 0,1
-
1 = VPBECLK,
can be used by
DAC
0 = GP[30]
Cfg Summary
8-bit EMIFA (NAND)
Pinout Mode 4
8-bit VENC
12-to-17 GP pins
VENCSEL = 1
-
1 = VCLK,
YOUT[7:0]
1 = GP[21:14]
0 = EM_A[2:1],
D2
100
RGBSEL = 0,1
EM_CS2
1 = EM_A[2:1],
0 = none
0 = GP[11:10, 7:5]
1 = LCD_FIELD 1 = GP[10, 7:5]
EM_CS2
D
CS3SEL = 0,1,2
1 = EM_CS3
2 = LCD_OE
0 = GP[13]
CS4SEL = 0,1,2
1 = EM_CS4
2 = VSYNC
0 = GP[32]
CS5SEL = 0,1,2
1 = EM_CS5
2 = HSYNC
0 = GP[33]
VPBECKEN = 0,1
-
1 = VPBECLK 0 = GP[30]
Cfg Summary
8-bit EMIFA (NAND)
Pinout Mode 4
16-to-18-bit
VENC
2-to-9 GP pins
VENCSEL = 2
-
2 = VCLK,
YOUT[7:0],
-
COUT[7:0]
0 = EM_A[2:1],
D3
EM_CS2
1 = EM_A[2:1],
100
RGBSEL = 0,1,2,3
EM_CS2
2 = EM_A[2:1],
EM_CS2
3 = EM_A[2:1],
0 = none
1 = LCD_FIELD
2 = R2, B2
3 = R2, B2,
LCD_FIELD
0 = GP[11:10, 7:5]
1 = GP[10, 7:5]
2 = GP[11:10, 7]
3 = GP[10, 7]
EM_CS2
CS3SEL = 0,1,2
1 = EM_CS3
2 = LCD_OE
0 = GP[13]
CS4SEL = 0,1,2
1 = EM_CS4
2 = VSYNC
0 = GP[32]
CS5SEL = 0,1,2
1 = EM_CS5
2 = HSYNC
0 = GP[33]
VPBECKEN = 0,1
-
1 = VPBECLK 0 = GP[30]
(1) Italics indicate mandatory setting for a given Minor Configuration option.
146 Device Configurations
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