TMS320TCI6486 Datasheet, PDF (14/268 Pages) Texas Instruments – TMS320TCI6486 Communications Infrastructure Digital Signal Processor

TMS320TCI6486
SPRS300N – FEBRUARY 2006 – REVISED JULY 2011
www.ti.com
Table 2-2. TCI6486 Memory Map Summary (continued)
MEMORY BLOCK DESCRIPTION
DSP5 L2 SRAM
Reserved
DSP5 L1P SRAM
Reserved
DSP5 L1D SRAM
Reserved
Reserved
DDR2 EMIF Config
Reserved
CE0-CE1 DDR2 SDRAM
BLOCK SIZE (BYTES)
608K
5M + 416K
32K
992K
32K
161M + 992K
DATA SPACE ON DMA
1408M
128M
1536M
512M
HEX ADDRESS RANGE
15800000 - 15897FFF
15898000 - 15DFFFF
15E00000 - 15E07FFF
15E08000 - 15EFFFFF
15F00000 - 15F07FFF
15F08000 - 1FFFFFFF
20000000 - 77FFFFFF
78000000 - 7FFFFFFF
80000000 - DFFFFFFF
E0000000 - FFFFFFFF
2.4 Boot Mode Sequence
The boot sequence is a process by which the DSP's internal memory is loaded with program and data
sections and the DSP's internal registers are programmed with predetermined values. The boot sequence
is started automatically after each power-on, warm, and system reset. For more details on the initiators of
these resets, see Section 7.7, Reset Controller.
There are several methods by which the memory and register initialization can take place. Each of these
methods is referred to as a boot mode. The boot mode to be used is selected at reset through the
BOOTMODE[3:0] pins.
2.4.1 Boot Modes Supported
The TMS320TCI6486 has a dedicated Boot Controller, which is responsible for managing the boot
process for single and multiple C64x+ megamodule core boots. There are two types of resets on the
TCI6486 device:
1. Device-level Resets (Global Resets)
– Power-on Reset; initiated by POR
– Chip-level Warm Reset (or Device Reset); initiated by RESET
– System Reset; initiated by a watchdog timeout or emulation
2. C64x+ megamodule-level Resets (Local Resets)
– External C64x+ megamodule selectable LRESET
– Local reset of the C64x+ megamodule initiated by on-chip Reset Controller
– Power Sleep Controller initiated by local C64x+ megamodule reset
After POR and RESET asserted resets, the boot controller selects the boot mode based on the status of
BOOTMODE[3:0] pins. When a system reset occurs, the boot mode used is determined by the
BOOTMODE field in the DEVSTAT register. All possible bootmodes are listed in Table 2-3. For a detailed
explanation of this operation, see the TMS320TCI648x Bootloader User's Guide (literature number
SPRUEA7).
Following a device-level reset, each C64x+ megamodule core can set its boot mode choice for
subsequent local resets using the registers BOOTMODE0 through BOOTMODE5 to either immediate boot
mode or host boot mode. The default values of these registers are set to immediate boot mode.
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