LMH0395 Datasheet, PDF (14/21 Pages) Texas Instruments – 3G HD/SD SDI Dual Output Low Power Extended Reach Adaptive Cable Equalizer

Application Information
APPLICATION CIRCUIT (SPI MODE)
Figure 13 shows the application circuit for the LMH0395 in
SPI mode. (Note: The application circuit shows an external
capacitor connected between the AEC+ and AEC- pins as
commonly configured in legacy equalizers. This capacitor is
optional and not necessary for the LMH0395; the AEC+ and
AEC- pins may be left unconnected with no change in perfor-
mance.)
FIGURE 13. Application Circuit (SPI Mode)
INTERFACING TO 3.3V SPI
The LMH0395 may be controlled via optional SPI register ac-
cess. The LMH0395 SPI pins support 2.5V LVCMOS logic
levels and are compliant with JEDEC JESD8-5 (see DC Elec-
trical Characteristics). Care must be taken when interfacing
the SPI pins to other voltage levels.
The 2.5V LMH0395 SPI pins may be interfaced to a 3.3V
compliant SPI host by using a voltage divider or level trans-
lator. One implementation is a simple resistive voltage divider
as shown in Figure 14.
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FIGURE 14. 3.3V SPI Interfacing
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