DAC8551-Q1 Datasheet, PDF (14/28 Pages) Texas Instruments – Automotive 16-Bit, Ultralow-Glitch, Voltage-Output DAC

DAC8551-Q1
SLASEB8A – FEBRUARY 2016 – REVISED MARCH 2016
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7.4 Device Functional Modes
7.4.1 Power-Down Modes
The DAC8551-Q1 supports four separate modes of operation. These modes are programmable by setting two
bits (PD1 and PD0) in the control register. Table 3 shows how the state of the bits corresponds to the mode of
operation of the device.
PD1 (DB17)
0
—
0
1
1
PD0 (DB16)
0
—
1
0
1
Table 3. Operating Modes
Normal operation
Power-down modes
Output typically 1 kΩ to GND
Output typically 100 kΩ to GND
High-Z
OPERATING MODE
When both bits are set to 0, the device works normally with its typical current consumption of 160 μA at 5 V.
However, for the three power-down modes, the supply current falls to 800 nA at 5 V. Not only does the supply
current fall, but the output stage is also internally switched from the output of the amplifier to a resistor network of
known values. This configuration has the advantage that the output impedance of the device is known while it is
in power-down mode. There are three different options. The output is connected internally to GND through a 1
kΩ resistor, a 100 kΩ resistor, or it is left open-circuited (High-Z). The output stage is illustrated in Figure 29.
V_FB
Resistor
String
DAC
Amplifier
Power-Down
Circuitry
V_OUT
Resistor
Network
Figure 29. Output Stage During Power Down
All analog circuitry is shut down when the power-down mode is activated. However, the contents of the DAC
register are unaffected when in power down. The time to exit power-down is typically 2.5 μs for V_DD = 5 V, and
5 μs for V_DD = 3.3 V. See the Typical Characteristics for more information.
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