TMS320DM368_17 Datasheet, PDF (13/208 Pages) Texas Instruments – Digital Media System-on-Chip (DMSoC)

TMS320DM368
www.ti.com
SPRS668C – APRIL 2010 – REVISED JUNE 2011
2.5 Power Management
The device is designed for minimal power consumption. There are two components to power
consumption: active power and leakage power. Active power is the power consumed to perform work and
scales with clock frequency and the amount of computations being performed. Active power can be
reduced by controlling the clocks in such a way as to either operate at a clock setting just high enough to
complete the required operation in the required time-line or to run at a clock setting until the work is
complete and then drastically cut the clocks (e.g. to PLL Bypass mode) until additional work must be
performed. Leakage power is due to static current leakage and occurs regardless of the clock rate.
Leakage, or standby power, is unavoidable while power is applied and scales roughly with the operating
junction temperatures. Leakage power can only be avoided by removing power completely from a device
or subsystem. The device includes several power management modes which are briefly described in
Table 2-2. See the TMS320DM36x DMSoC ARM Subsystem Reference Guide (literature number
SPRUFG5) for more information on power management.
Table 2-2. Power Management Conditions
POWER MGMT.
APPLICATION
SCENARIO
PRTCSS
Deep Sleep Mode⁽¹⁾
Standby
Low-power
(PLL Bypass Mode)
System Running
(PLL Mode)
PRTCSS
Active
Active
Active
Active
Active
CORE
POWER
Off
On
On
On
On
OSC.
POWER
Off
Off
On
On
On
PLL
ARM926
CNTRLR. CLOCK
Off
Off
Bypass
Mode
(not
Off
Active)
Bypass
Mode
Off
Bypass
Mode
On
PLL Mode
On
GIO,
UART,
I2C
CLOCKS
Off
Off
On
On / Off
On / Off
SPI,
PWM,
TIMER
CLOCKS
Off
Off
Off
On / Off
On / Off
OTHER
PERIPH.
CLOCKS
DDR
CLOCK/
MODE
DESCRIPTION
Off
Off
Off
On / Off
On / Off
This condition
Off
consumes the lowest
possible power, except
for the PRTCSS.
Suspend /
"Self-
Refresh"
This mode consumes
the second lowest
possible power, except
for PRTCSS and core
power, where only the
deep sleep circuit is on
in this mode.
Suspend /
"Self-
Refresh"
This condition keeps
the minimum possible
modules powered-on
in order to wake up the
device. Clocks are
suspended except for
GIO (interrupts),
UART, and I2C (in
slave mode).
Suspend /
"Self-
Refresh"
Most clocks are
suspended, except for
ARM, GIO, UART,
SPI, I2C, PWM, and
timers. Since ARM will
not have access to
DDR, its internal
Cache will be either
frozen or not
accessed.
Nominal
Clock /
Operation
The device, including
system PLLs, are on.
This condition
conserves the least
amount of power.
(1) For more details, see TMS320DM36x DMSoC ARM Subsystem Reference Guide (literature number SPRUFG5)
Copyright © 2010–2011, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TMS320DM368
Device Overview
13