MSP430F530X_12 Datasheet, PDF(13/100 Page) Texas Instruments

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MSP430F530X_12 Datasheet, PDF (13/100 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

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MSP430F530x, MSP430F5310

www.ti.com

SLAS677C â SEPTEMBER 2010 â REVISED SEPTEMBER 2012

SHORT-FORM DESCRIPTION

CPU (Link to User's Guide)

The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations,

other than program-flow instructions, are performed as register operations in conjunction with seven addressing

modes for source operand and four addressing modes for destination operand.

The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to-register

operation execution time is one cycle of the CPU clock.

Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register, and constant

generator, respectively. The remaining registers are general-purpose registers.

Peripherals are connected to the CPU using data, address, and control buses, and can be handled with all

instructions.

The instruction set consists of the original 51 instructions with three formats and seven address modes and

additional instructions for the expanded address range. Each instruction can operate on word and byte data.

Program Counter

Stack Pointer

Status Register

Constant Generator

General-Purpose Register

PC/R0

SP/R1

SR/CG1/R2

CG2/R3

R10

R11

R12

R13

R14

R15

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