OMAP3530ECUS Datasheet, PDF (123/264 Pages) Texas Instruments – OMAP3530/25 Applications Processor: OMAP 3 Architecture

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OMAP3530/25 Applications Processor
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
3.3 Recommended Operating Conditions
All OMAP3530/25 modules are used under the operating conditions contained in Table 3-3.
Note:
To avoid significant device degradation for commercial temperature OMAP3530/OMAP3525 devices (0°C
≤ T_j ≤ 90°C), the device power-on hours (POH) must be limited to one of the following:
• 100K total POH when operating across all OPPs and keeping the time spent at OPP5-OPP6 to less
than 23K POH.
• 50K total POH when operating at OPP5 - OPP6.
• 44K total POH with no restrictions to the proportion of these POH at operating points OPP1 - OPP6.
To avoid significant device degradation for extended temperature OMAP3530A/OMAP3525A devices
(-40°C ≤ T_j ≤ 105°C), the following restrictions apply:
• OPP5 and OPP6 are not supported.*
• The total device POH must be limited to less than 50K.*
*If an extended temperature device is operated such that T_j never exceeds 90C (-40°C ≤T_j ≤ 90°C) then
the OPP POH limits for commercial devices indicated above apply.
Note: Logic functions and parameter values are not assured out of the range specified in the
recommended operating conditions.
Table 3-3. Recommended Operating Conditions
PARAMETER
V_DD1
(vdd_mpu_iva),
SmartReflex
Disabled
DESCRIPTION
OMAP processor logic supply
OPP6: Overdrive ⁽¹⁾
OPP5: Overdrive
OPP4: Mid-Overdrive
OPP3: Nominal
OPP2: Low-Power
V_DD2 (vdd_core) OMAP core logic supply⁽³⁾
SmartReflex
Disabled
OPP1: Ultra
Low-Power ⁽²⁾
OPP3: Nominal
OPP2: Low-Power
vdds
vdds_mem
vdds_mmc1
vdds_mmc1a
vdds_wkup_bg
OPP1: Ultra
Low-Power ⁽²⁾
Supply voltage for I/O macros
Noise (peak-peak)
Supply voltage for memory I/O macros
Noise (peak-peak)
Supply voltage range for MMC1
CMD, CLK and DAT[3:0] and for
memory stick I/Os
1.8-V mode
3.0-V mode
Second supply voltage range for
MMC1 DAT[7:4]
1.8-V mode
3.0-V mode
Wakeup LDO
MIN
V_DD1NOM -
(0.05*V_DD1NOM)
V_DD1NOM -
(0.05*V_DD1NOM)
V_DD1NOM -
(0.05*V_DD1NOM)
V_DD1NOM -
(0.05*V_DD1NOM)
V_DD1NOM -
(0.05*V_DD1NOM)
V_DD1NOM -
(0.05*V_DD1NOM)
V_DD2NOM -
(0.05*V_DD2NOM)
V_DD2NOM -
(0.05*V_DD2NOM)
V_DD2NOM -
(0.05*V_DD2NOM)
1.71
NOM
1.35
1.35
1.27
1.20
1.06
0.985
1.15
1.06
0.985
1.8
1.71
1.8
1.71
1.8
2.7
3.0
1.71
1.8
2.7
3.0
1.71
1.8
MAX
V_DD1NOM +
(0.05*V_DD1NOM)
V_DD1NOM +
(0.05*V_DD1NOM)
V_DD1NOM +
(0.05*V_DD1NOM)
V_DD1NOM +
(0.05*V_DD1NOM)
V_DD1NOM +
(0.05*V_DD1NOM)
V_DD1NOM +
(0.05*V_DD1NOM)
V_DD2NOM +
(0.05*V_DD2NOM)
V_DD2NOM +
(0.05*V_DD2NOM)
V_DD2NOM +
(0.05*V_DD2NOM)
1.91
90
1.89
90
1.89
3.3
UNIT
V
V
V
V
V
V
V
V
V
V
mVpp
V
mVpp
V
V
1.89
V
3.3
1.89
V
(1) OPP6 is only supported on high-speed grade OMAP3530/25 devices.
(2) Cannot boot in OPP1. If OPP1 is desired, boot in higher OPP then switch to OPP1.
(3) Core logic includes interconnect, graphics processor, and peripherals.
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