DM3730_11 Datasheet, PDF (121/280 Pages) Texas Instruments – Digital Media Processors

DM3730, DM3725
www.ti.com
SPRS685D – AUGUST 2010 – REVISED JULY 2011
3.3 DC Electrical Characteristics
Table 3-5 summarizes the dc electrical characteristics.
Note: The interfaces or signals described in Table 3-5 correspond to the interfaces or signals available in
multiplexing mode 0. All interfaces or signals multiplexed on the balls / pins described in Table 3-5 have
the same DC electrical characteristics.
Table 3-5. DC Electrical Characteristics
PARAMETER
MIN
NOM
MAX
UNIT
SDRC Mode (CBP Balls⁽¹⁹⁾: C14 / B14 / C15 / B16 / D17 / C17 / B17 / D18 / H9 / H10 / H11 / H12 / A13 / A14 / H16 / H17 / H14 / H13 /
H15 / A16 / A17)⁽⁴⁾
V_IH
V_IL
V_HYS ⁽¹⁾
V_OH
High-level input voltage
Low-level input voltage
Hysteresis voltage at an input
High-level output voltage, driver enabled,
pullup or pulldown disabled
I_OH = –4 mA
0.7 * vdds_mem
0.07
0.8 * vdds_mem
V
0.3 * vdds_mem
V
V
vdds_mem
V
V_OL
Low-level output voltage, driver enabled, I_OL = 4 mA
0
pullup or pulldown disabled
0.2 * vdds_mem
V
C_IN
t_TIN(2)
Input capacitance
Input recommended rise, t_RIN, and fall time, t_FIN (measured
between 20% and 80% at PAD)
t_ROUT(2) Output maximum rise time (rise time, t_ROUT, evaluated
between 20% and 80% at PAD) @ maximum load
t_FOUT(2) Output maximum fall time (fall time, t_FOUT, evaluated
between 20% and 80% at PAD) @ maximum load
C_OUT
Load capacitance
DS0 = 0⁽³⁾
2
DS0 = 1⁽³⁾
4
MMC Interface 1 Mode (CBP Balls⁽¹⁹⁾: N28 / M27 / N27 / N26 / N25 / P28)
1.15
pF
10
ns
1.15
ns
1.10
ns
4
pF
12
1.8-V Mode
V_IH
V_IL
V_OH
V_OL
V_HYS ⁽¹⁾
t_TIN ⁽²⁾
High-level input voltage
Low-level input voltage
High-level output voltage with 100-μA sink current I_OH
Low-level output voltage with 100-μA sink current at
vdds_mmc1 minimum
Hysteresis voltage at an input
Input transition time (t_RIN or t_FIN evaluated
between 10% and 90% at PAD)
Normal Mode
(SPEEDCTRL
= 1)⁽⁴⁾
0.70 * vdds_mmc1
–0.3
vdds_mmc1 – 0.2
0.1
vdds_mmc1 + 0.3
V
0.30 * vdds_mmc1
V
V
0.2
V
V
3
ns
High-Speed
8
(SPEEDCTRL
= 0)⁽⁴⁾
C_OUT
Load capacitance
L_OUT
Line inductance (except vdds_mmc1)
3.0-V Mode
10
30
pF
16
nH
V_IH
V_IL
V_OH
V_OL
V_HYS ⁽¹⁾
High-level input voltage
Low-level input voltage
High-level output voltage with 100-μA sink current I_OH
Low-level output voltage with 100-μA source current at
vdds_mmc1 minimum
Hysteresis voltage at an input
0.625 * vdds_mmc1
–0.3
0.75 * vdds_mmc1
0.05
vdds_mmc1 + 0.3
V
0.25 * vdds_mmc1
V
V
0.125 * vdds_mmc1
V
V
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Electrical Characteristics 121