THS7347_15 Datasheet, PDF (12/33 Pages) Texas Instruments – 3-Channel RGBHV Video Buffer with I2C Control, 2:1 Input Mux, Monitor Pass-Through, and Selectable Input Bias Modes

THS7347
SLOS531B – MAY 2007 – REVISED OCTOBER 2011
www.ti.com
TERMINAL
NAME
NO.
H-SYNC, INPUT B
10
V-SYNC, INPUT B
11
I²C, A1
17
I²C, A0
18
SDA
19
SCL
20
PUC
21
MUX MODE
15
MUX SELECT
16
CH. 1, BUFFER OUTPUT
35, 36
CH. 2, BUFFER OUTPUT
31, 32
CH. 3, BUFFER OUTPUT
27, 28
H-SYNC BUFFER
OUTPUT
25
V-SYNC BUFFER
OUTPUT
24
CH. 1, SAG
45
CH. 1, MONITOR
OUTPUT
46
CH. 2, SAG
43
CH. 2, MONITOR
OUTPUT
44
CH. 3, SAG
41
CH. 3, MONITOR
OUTPUT
H-SYNC MONITOR
OUTPUT
V-SYNC MONITOR
OUTPUT
AGND
+V_A
V_DD
DGND
42
40
39
6, 12, 13, 26,
30, 34, 37, 47
29, 33, 38, 48
22
23
Schmitt Trigger Adjust
14
TERMINAL FUNCTIONS (continued)
I/O
DESCRIPTION
I Horizontal Sync, Input B
I Vertical Sync, Input B
I
I²C Slave Address Control Bit A1. Connect to V_DD for a logic 1 preset value or GND for a logic 0 preset
value.
I
I²C Slave Address Control Bit A0. Connect to V_DD for a logic 1 preset value or GND for a logic 0 preset
value.
I/O ^{Serial data line of the I2C bus. Pull-up resistor should have a minimum value = 2 kΩ and a maximum value}
= 19 kΩ. Pull up to V_DD.
I
I²C bus clock line. Pull-up resistor should have a minimum value = 2 kΩ and a maximum value = 19 -kΩ.
Pull up to V_DD.
Power-Up Condition. Connect to GND for all channels disabled upon power-up. Connect to V_DD (logic
I high) to set buffer outputs to OFF and monitor outputs ON with ac-bias configuration on Channels 1 to 3
and both H-Sync/V-Sync enabled.
I
Sets the MUX configuration control. Connect to logic low for MUX Select (pin 16) control of the MUX.
Connect to logic high for I²C control of the MUX.
I
Controls the MUX selection when MUX MODE (pin 15) is set to logic low. Connect to logic low for MUX
selector set to Input A. Connect to logic high for MUX selector set to Input B.
O
Output Channel 1 from either CH. 1, INPUT A or CH. 1, INPUT B. Connect to ADC/Scalar/Decoder. Both
pins should be connected together on the PCB.
O
Output Channel 2 from either CH. 2, INPUT A or CH. 2, INPUT B. Connect to ADC/Scalar/Decoder. Both
pins should be connected together on the PCB.
O
Output Channel 3 from either CH. 3, INPUT A or CH. 3, INPUT B. Connect to ADC/Scalar/Decoder. Both
pins should be connected together on the PCB.
O Horizontal Sync Buffer Output. Connect to ADC/Scalar H-sync input.
O Vertical Sync Buffer Output. Connect to ADC/Scalar V-sync input.
O
Video Monitor Pass-Through Output Channel 1 SAG Correction pin. If SAG is not used, connect Directly to
CH. 1, OUTPUT pin 46.
O Video Monitor Pass-Through Output Channel 1 from either CH. 1, INPUT A or CH. 1, INPUT B.
O
Video Monitor Pass-Through Output Channel 2 SAG Correction pin. If SAG is not used, connect Directly to
CH. 2, OUTPUT pin 44.
O Video Monitor Pass-Through Output Channel 2 from either CH. 2, INPUT A or CH. 2, INPUT B.
O
Video Monitor Pass-Through Output Channel 3 SAG Correction pin. If SAG is not used, connect Directly to
CH. 3, OUTPUT pin 42.
O Video Monitor Pass-Through Output Channel 3 from either CH. 3, INPUT A or CH. 3, INPUT B.
O Horizontal Sync Monitor Pass-Through Output.
O Vertical Sync Monitor Pass-Through Output.
I
Ground Reference pin for analog signals. Internally, these pins connect to DGND, although it is
recommended to have the AGND and DGND connected to the proper signals for best results.
I Analog Positive Power Supply Input pins. Connect to 2.7 V to 5 V. Must be equal to or greater than VDD.
I Digital Positive Supply pin for I²C circuitry and H-Sync/V-Sync outputs. Connect to 2.7 V to 5 V.
I Digital GND pin for HV circuitry and I²C circuitry.
I
Defaults to 1.45 V (TTL compatible). Connect to external voltage reference to adjust H-Sync/V-Sync input
thresholds from 0.9 V to 2 V range.
12
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