LP3936 Datasheet, PDF (12/30 Pages) National Semiconductor (TI) – Lighting Management System for Six White LEDs and One RGB or FLASH LED

LP3936
SNVS259D – NOVEMBER 2003 – REVISED MAY 2013
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SDA
8
SCL
1
7
6
2
8
1
5
3
4
Figure 11. I²C Timing Diagram
10
7
9
I²C Timing Parameters⁽¹⁾
V_{DD1, 2} = 3.0V to 4.5V, V_{DD_IO} = 1.65V to V_{DD1, 2}
Symbol
Parameter
1
Hold Time (repeated) START Condition
2
Clock Low Time
3
Clock High Time
4
Setup Time for a Repeated START Condition
5
Data Hold Time (output direction, delay generated by LP3936)
5
Data Hold Time (input direction)
6
Data Setup Time
7
Rise Time of SDA and SCL
8
Fall Time of SDA and SCL
9
Set-Up Time for STOP Condition
10
Bus Free Time between a STOP and a START Condition
C_b
Capacitive Load for Each Bus Line
(1) Specified by design. Not production tested.
Limits
Min
Max
0.6
1.3
600
600
300
900
0
900
100
20 + 0.1C_b
300
15 + 0.1C_b
300
600
1.3
10
200
Units
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
µs
pF
A/D Converter for Ambient Light Measurement
Electrical Characteristics
Symbol
V_{IN RANGE}
Parameter
Input Voltage
DNL
GE
PSS
f(conv)
Differential Non-Linearity
Gain Error
Power Supply Sensitivity
Conversion Rate
t_STARTUP
I_AIN
I_AREF
R_AREF
Startup Time
Input Current
Maximum Output Current
AREF Output Resistance
Conditions
AD Output: 00h
AD Output: FFh
3.1V ≤ V_DD ≤ 4.2V
Without Averaging
With Averaging
(64 samples)
1.23 < AIN < 2.6V
AREF Output Current Sink
Min
Typ
Max
Units
1.23
V
2.46
V
–1.5
±1
+1.5
LSB
−5
+5
LSB
±1/2
LSB
217
Hz
3.4
Hz
100
ms
±0.1
µA
200
µA
110
Ω
ADC output AIN[7:0] can be read from address 0CH after startup time. Overflow bit can be read from bit D7 in
address 0BH. The overflow bit indicates that input voltage exceeds the input voltage range of the ADC. The ADC
output value in this case is FFH. When averaging is on, the overflow is high, if any of the 64 conversion results in
the averaging period overflows. Thus the averaged result may be considerably below maximum and the overflow
can still be high, if the input signal is noisy.
12
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