LP3936 Datasheet, PDF (11/30 Pages) National Semiconductor (TI) – Lighting Management System for Six White LEDs and One RGB or FLASH LED

LP3936
www.ti.com
SNVS259D – NOVEMBER 2003 – REVISED MAY 2013
TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first.
Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated
by the master. The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse. The receiver
must pull down the SDA line during the 9th clock pulse, signifying an acknowledge. A receiver which has been
addressed must generate an acknowledge after each byte has been received.
After the START condition, the I²C master sends a chip address. This address is seven bits long followed by an
eighth bit which is a data direction bit (R/W). The LP3936 address is 36h. For the eighth bit, a “0” indicates a
WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The
third byte contains data to write to the selected register.
MSB
ADR6
bit7
ADR5
bit6
ADR4
bit5
ADR3
bit4
ADR2
bit3
ADR1
bit2
ADR0
bit1
LSB
R/W
bit0
0
1
1
0
1
1
0
I²C SLAVE address (chip address)
Figure 8. I²C Chip Address
ack from slave
ack from slave
ack from slave
start msb Chip Address lsb w ack msb Register Add lsb ack
msb DATA lsb
ack stop
SCL
SDA
start
Id = 36h
w ack
addr = 02h
ack
DGGUHVV K¶02 data
w = write (SDA = “0”)
r = read (SDA = “1”)
ack = acknowledge (SDA pulled down by either master or slave)
rs = repeated start
id = chip address, 36h for LP3936
Figure 9. I²C Write Cycle
ack stop
When a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in
the Read Cycle Waveform.
ack from slave
ack from slave repeated start
ack from slave data from slave ack from master
start msb Chip Address lsb w
msb Register Add lsb
rs msb Chip Address lsb r
msb DATA lsb
stop
SCL
SDA
start
Id = 36h
w ack
addr = K¶00
ack rs
Id = 36h
Figure 10. I²C Read Cycle
r ack $GGUHVV K¶00 data ack stop
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