LP3936 Datasheet, PDF (10/30 Pages) National Semiconductor (TI) – Lighting Management System for Six White LEDs and One RGB or FLASH LED

LP3936
SNVS259D – NOVEMBER 2003 – REVISED MAY 2013
MicroWire Timing Parameters⁽¹⁾
V_DD1,2 = 3.0V – 6V, V_{DD_IO} = 1.8V – V_DD1,2
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Symbol
Parameter
1
Cycle Time
2
Enable Lead Time
3
Enable Lag Time
4
Clock Low Time
5
Clock High Time
6
Data Setup Time
7
Data Hold Time
8
Data Access Time
9
Disable Time
10
Output Data Valid
11
Output Data Hold Time
12
CS Inactive Time
(1) Specified by design. Not production tested.
Limit
Min
Max
120
60
60
60
60
0
10
35
30
55
15
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
I²C Compatible Interface
I²C SIGNALS
In I²C mode the LP3936 pin SCL is used for the I²C clock and the pin CS is used for the I²C data signal SDA.
Both these signals need a pull-up resistor according to I²C specification. Unused pin DO can be left unconnected
and pin DI must be connected to V_{DD_IO} or GND.
I²C DATA VALIDITY
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of
the data line can only be changed when CLK is LOW.
SCL
SDA
data
change
allowed
data
valid
data
change
allowed
data
valid
data
change
allowed
I²C START AND STOP CONDITIONS
START and STOP bits classify the beginning and the end of the I²C session. START condition is defined as SDA
signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA
transitioning from LOW to HIGH while SCL is HIGH. The I²C master always generates START and STOP bits.
The I²C bus is considered to be busy after START condition and free after STOP condition. During data
transmission, I²C master can generate repeated START conditions. First START and repeated START
conditions are equivalent, function-wise.
SDA
SCL
S
START condition
P
STOP condition
10
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