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LM3S5951 Datasheet, PDF (1191/1261 Pages) Texas Instruments – Stellaris® LM3S5951 Microcontroller
Stellaris® LM3S5951 Microcontroller
25.13
Table 25-21. GPIO Module Characteristics (continued)
Parameter Parameter Name
Min
Nom
Max
Unit
GPIO Rise Time, 2-mA driveb
14
20
ns
TGPIOR
GPIO Rise Time, 4-mA driveb
GPIO Rise Time, 8-mA driveb
7
10
ns
-
4
5
ns
GPIO Rise Time, 8-mA drive with slew rate controlb
6
8
ns
GPIO Fall Time, 2-mA drivec
14
21
ns
TGPIOF
GPIO Fall Time, 4-mA drivec
GPIO Fall Time, 8-mA drivec
7
11
ns
-
4
6
ns
GPIO Fall Time, 8-mA drive with slew rate controlc
6
8
ns
a. The leakage current is measured with GND or VDD applied to the corresponding pin(s). The leakage of digital port pins
is measured individually. The port pin is configured as an input and the pullup/pulldown resistor is disabled.
b. Time measured from 20% to 80% of VDD.
c. Time measured from 80% to 20% of VDD.
Analog-to-Digital Converter (ADC)
Table 25-22. ADC Characteristicsa
Parameter Parameter Name
Min
Nom
Max
Unit
Maximum single-ended, full-scale analog input
-
-
3.0
V
voltage, using internal reference
Maximum single-ended, full-scale analog input
-
-
VREFA
V
voltage, using external reference
Minimum single-ended, full-scale analog input voltage 0.0
-
-
V
VADCIN
Maximum differential, full-scale analog input voltage,
-
-
1.5
V
using internal reference
Maximum differential, full-scale analog input voltage,
-
-
VREFA/2
V
using external reference
Minimum differential, full-scale analog input voltage 0.0
-
-
V
N
Resolution
10
bits
FADC
TADCCONV
FADCCONV
ADC internal clock frequencyb
Conversion timec
Conversion ratec
15.9952
16
1
1000
16.0048
MHz
µs
k samples/s
TADCSAMP Sample time
187.5
-
-
ns
TLT
Latency from trigger to start of conversion
-
2
-
system clocks
IL
ADC input leakage
-
-
2.0
µA
RADC
ADC equivalent resistance
-
-
10
kΩ
CADC
ADC equivalent capacitance
0.9
1.0
1.1
pF
EL
Integral nonlinearity (INL) error
-
-
±3
LSB
ED
Differential nonlinearity (DNL) error
-
-
±3
LSB
EO
Offset error
-
-
±20
LSB
EG
Full-scale gain error
ETS
Temperature sensor accuracyd
-
-
±30
LSB
-
-
±5
°C
a. The ADC reference voltage is 3.0 V. This reference voltage is internally generated from the 3.3 VDDA supply by a band
gap circuit.
b. The ADC must be clocked from the PLL or directly from an external clock source to operate properly.
January 20, 2012
Texas Instruments-Production Data
1191