TM4C1237D5PM Datasheet, PDF (1185/1264 Pages) Texas Instruments – Floating-Point Status Control (FPSC)

Tiva^™ TM4C1237D5PM Microcontroller _{(identical to LM4F130C4QR)}
Table 19-4. Analog Comparator Voltage Reference Characteristics, V_DDA = 3.3V, EN= 1, and
RNG = 1 (continued)
VREF Value
0xB
0xC
0xD
0xE
0xF
V_IREF Min
1.567
1.717
1.866
2.015
2.164
Ideal V_IREF
1.641
1.790
1.939
2.089
2.238
V_IREF Max
1.715
1.864
2.013
2.162
2.311
Unit
V
V
V
V
V
19.4
Initialization and Configuration
The following example shows how to configure an analog comparator to read back its output value
from an internal register.
1. Enable the analog comparator clock by writing a value of 0x0000.0001 to the RCGCACMP
register in the System Control module (see page 340).
2. Enable the clock to the appropriate GPIO modules via the RCGCGPIO register (see page 327).
To find out which GPIO ports to enable, refer to Table 21-5 on page 1213.
3. In the GPIO module, enable the GPIO port/pin associated with the input signals as GPIO inputs.
To determine which GPIO to configure, see Table 21-4 on page 1208.
4. Configure the PMCn fields in the GPIOPCTL register to assign the analog comparator output
signals to the appropriate pins (see page 660 and Table 21-5 on page 1213).
5. Configure the internal voltage reference to 1.65 V by writing the ACREFCTL register with the
value 0x0000.030C.
6. Configure the comparator to use the internal voltage reference and to not invert the output by
writing the ACCTLn register with the value of 0x0000.040C.
7. Delay for 10 µs.
8. Read the comparator output value by reading the ACSTATn register’s OVAL value.
Change the level of the comparator negative input signal C- to see the OVAL value change.
19.5
Register Map
Table 19-5 on page 1185 lists the comparator registers. The offset listed is a hexadecimal increment
to the register’s address, relative to the Analog Comparator base address of 0x4003.C000. Note
that the analog comparator clock must be enabled before the registers can be programmed (see
page 340). There must be a delay of 3 system clocks after the analog comparator module clock is
enabled before any analog comparator module registers are accessed.
Table 19-5. Analog Comparators Register Map
Offset Name
Type
Reset
Description
0x000
0x004
ACMIS
ACRIS
R/W1C
RO
0x0000.0000
0x0000.0000
Analog Comparator Masked Interrupt Status
Analog Comparator Raw Interrupt Status
See
page
1187
1188
July 16, 2013
Texas Instruments-Production Data
1185