AM5718_16 Datasheet, PDF (113/394 Pages) Texas Instruments – Sitara Processors Silicon Revision 2.0

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AM5718, AM5716
SPRS957C – MARCH 2016 – REVISED NOVEMBER 2016
SIGNAL NAME
qspi1_sclk
qspi1_rtclk
qspi1_d0
qspi1_d1
qspi1_d2
qspi1_d3
qspi1_cs0
qspi1_cs1
qspi1_cs2
qspi1_cs3
Table 4-15. QSPI Signal Descriptions
DESCRIPTION
QSPI1 Serial Clock
QSPI1 Return Clock Input. Must be connected from QSPI1_SCLK on PCB. Refer
to PCB Guidelines for QSPI1
QSPI1 Data[0].This pin is output data for all commands/writes and for dual read
and quad read modes it becomes input data pin during read phase.
QSPI1 Data[1].Input read data in all modes.
QSPI1 Data[2].This pin is used only in quad read mode as input data pin during
read phase
QSPI1 Data[3].This pin is used only in quad read mode as input data pin during
read phase
QSPI1 Chip Select[0].This pin is Used for QSPI1 boot modes.
QSPI1 Chip Select[1]
QSPI1 Chip Select[2]
QSPI1 Chip Select[3]
TYPE
IO
I
IO
IO
IO
IO
O
O
O
O
4.4.13 Multichannel Audio Serial Port (McASP)
BALL
R2
R3
U1
P3
U2
T2
P2
P1
T7
P6
NOTE
For more information, see the Serial Communication Interface / Multichannel Audio Serial
Port (McASP) section of the device TRM.
Table 4-16. McASP Signal Descriptions
SIGNAL NAME DESCRIPTION
Multichannel Audio Serial Port 1
mcasp1_axr0
McASP1 Transmit/Receive Data
mcasp1_axr1
McASP1 Transmit/Receive Data
mcasp1_axr2
McASP1 Transmit/Receive Data
mcasp1_axr3
McASP1 Transmit/Receive Data
mcasp1_axr4
McASP1 Transmit/Receive Data
mcasp1_axr5
McASP1 Transmit/Receive Data
mcasp1_axr6
McASP1 Transmit/Receive Data
mcasp1_axr7
McASP1 Transmit/Receive Data
mcasp1_axr8
McASP1 Transmit/Receive Data
mcasp1_axr9
McASP1 Transmit/Receive Data
mcasp1_axr10 McASP1 Transmit/Receive Data
mcasp1_axr11 McASP1 Transmit/Receive Data
mcasp1_axr12 McASP1 Transmit/Receive Data
mcasp1_axr13 McASP1 Transmit/Receive Data
mcasp1_axr14 McASP1 Transmit/Receive Data
mcasp1_axr15 McASP1 Transmit/Receive Data
mcasp1_fsx
mcasp1_aclkr⁽¹⁾
McASP1 Transmit Frame Sync
McASP1 Receive Bit Clock
mcasp1_fsr
McASP1 Receive Frame Sync
mcasp1_ahclkx
mcasp1_aclkx⁽¹⁾
McASP1 Transmit High-Frequency Master Clock
McASP1 Transmit Bit Clock
Multichannel Audio Serial Port 2
mcasp2_axr0
McASP2 Transmit/Receive Data
mcasp2_axr1
McASP2 Transmit/Receive Data
TYPE
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
O
IO
IO
IO
BALL
G12
F12
G13
J11
D18/ E12
E17 / F13
B26 / C12
C23 / D12
E21 / B12
F20/ A11
F21 / B13
A12
E14
A13
G14
F14
D14
B14
J14
D18
C14
B15
A15
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Terminal Configuration and Functions 113