TMS320TCI6604 Datasheet, PDF (110/223 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320TCI6604
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS783C—February 2012
7 Peripheral Information and Electrical Specifications
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This chapter covers the various peripherals on the TMS320TCI6604 DSP. Peripheral-specific information, timing
diagrams, electrical specifications, and register memory maps are described in this chapter.
7.1 Recommended Clock and Control Signal Transition Behavior
All clocks and control signals must transition between V_IH and V_IL (or between V_IL and V_IH) in a monotonic
manner.
7.2 Power Supplies
The following sections describe the proper power-supply sequencing and timing needed to properly power on the
TCI6604. The various power supply rails and their primary function is listed in Table 7-1.
Table 7-1
Power Supply Rails on TMS320TCI6604
Name
Primary Function
Voltage Notes
CVDD
SmartReflex core supply voltage 0.9 - 1.1 V Includes core voltage for DDR3 module
CVDD1
Core supply voltage for memory
array
1.0 V
Fixed supply at 1.0 V
VDDT1
HyperLink SerDes termination
supply
1.0 V
Filtered version of CVDD1. Special considerations for noise. Filter is not needed if
HyperLink is not in use.
VDDT2
SGMII/SRIO/PCIE SerDes
termination supply
1.0 V
Filtered version of CVDD1. Special considerations for noise. Filter is not needed if
SGMII/SRIO/PCIE is not in use.
DVDD15 1.5-V DDR3 IO supply
1.5 V
Fixed supply at 1.5V
VDDR1
HyperLink SerDes regulator supply 1.5 V
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if
HyperLink is not in use.
VDDR2
PCIE SerDes regulator supply
1.5 V
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if PCIE
is not in use.
VDDR3
SGMII SerDes regulator supply
1.5 V
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if
SGMII is not in use.
VDDR4
SRIO SerDes regulator supply
1.5 V
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if SRIO
is not in use.
DVDD18 1.8-V IO supply
1.8V
Fixed supply at 1.8V
AVDDA1 Main PLL supply
1.8 V
Filtered version of DVDD18. Special considerations for noise.
AVDDA2 DDR3 PLL supply
1.8 V
Filtered version of DVDD18. Special considerations for noise.
AVDDA3 PASS PLL supply
1.8 V
Filtered version of DVDD18. Special considerations for noise.
VREFSSTL 0.75-V DDR3 reference voltage
0.75 V Should track the 1.5-V supply. Use 1.5 V as source.
VSS
Ground
GND
Ground
End of Table 7-1
110 Peripheral Information and Electrical Specifications
Copyright 2012 Texas Instruments Incorporated