English
Language : 

BQ40Z50 Datasheet, PDF (11/30 Pages) Texas Instruments – 1-Series, 2-Series, 3-Series, and 4-Series Li-Ion Battery Pack Manager
bq40z50
www.ti.com
SLUSBS8 – DECEMBER 2013
Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC =
2.2 V to 26 V (unless otherwise noted)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
ILEDCNTLx
Current matching
between LEDCNTLx
VBAT = VLEDCNTLx + 2.5 V
+/–1
%
CIN
ILKG
fLEDCNTLx
Input capacitance
Input leakage current
Frequency of LED
pattern
20
pF
1
µA
124
Hz
COULOMB COUNTER
Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC =
2.2 V to 26 V (unless otherwise noted)
PARAMETER
TEST CONDITION
Input voltage range
Full scale range
Integral nonlinearity(1)
16-bit, best fit over input voltage range
Offset error
16-bit, Post-calibration
Offset error drift
15-bit + sign, Post-calibration
Gain error
15-bit + sign, over input voltage range
Gain error drift
15-bit + sign, over input voltage range
Effective input resistance
(1) 1 LSB = VREF1/(10 × 2N) = 1.215/(10 × 215) = 3.71 µV
MIN
–0.1
–VREF1/10
TYP
±5.2
±5
0.2
±0.2
2.5
MAX
0.1
VREF1/10
±22.3
±10
0.3
±0.8
150
UNIT
V
V
LSB
µV
µV/°C
%FSR
PPM /°C
MΩ
CC DIGITAL FILTER
Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC =
2.2 V to 26 V (unless otherwise noted)
PARAMETER
Conversion time
Effective resolution
TEST CONDITION
Single conversion
Single conversion
MIN
TYP
MAX
UNIT
250
ms
15
Bits
ADC
Typical values stated where TA = 25°C and VCC = 14.4 V, Min/Max values stated where TA = –40°C to 85°C and VCC =
2.2 V to 26 V (unless otherwise noted)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
Input voltage range
Full scale range
Integral nonlinearity(1)
Offset error(2)
Offset error drift
Gain error
Gain error drift
Effective input resistance
Internal reference (VREF1)
External reference (VREG)
VFS = VREF1 or VREG
16-bit, best fit, –0.1 V to 0.8 x VREF1
16-bit, best fit, –0.2 V to –0.1 V
16-bit, Post-calibration, VFS = VREF1
16-bit, Post-calibration, VFS = VREF1
16-bit, –0.1 V to 0.8 x VFS
16-bit, –0.1 V to 0.8 x VFS
–0.2
–0.2
–VFS
8
1
V
0.8 x VREG
VFS
V
±6.6
LSB
±13.1
±67
±157
µV
0.6
3
µV/°C
±0.2
±0.8
%FSR
150
PPM/°C
MΩ
(1) 1 LSB = VREF1/(2N) = 1.225/(215) = 37.4 µV (when tCONV = 31.25 ms)
(2) For VC1–VSS, VC2–VC1, VC3–VC2, VC4–VC3, VC4–VSS, PACK–VSS, and VREF1/2, the offset error is multiplied by (1/ADC
multiplexer scaling factor (K)).
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: bq40z50
Submit Documentation Feedback
11