DS92LV1212_11 Datasheet, PDF (10/15 Pages) Texas Instruments – 16-40 MHz 10-Bit Bus LVDS Random Lock Deserializer with Embedded Clock Recovery

AC Timing Diagrams and Test Circuits (Continued)
FIGURE 7. Deserializer PLL Lock Times and PWRDN TRI-STATE Delays
DS100982-15
FIGURE 8. Deserializer PLL Lock Time from SyncPAT
9
DS100982-22
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