DS64EV100_15 Datasheet, PDF (1/16 Pages) Texas Instruments – Programmable Single Equalizer

DS64EV100
www.ti.com
SNLS232E – OCTOBER 2006 – REVISED FEBRUARY 2013
DS64EV100 Programmable Single Equalizer
Check for Samples: DS64EV100
FEATURES
1
•2 Equalizes up to 24 dB loss at 10 Gbps
• Equalizes up to 22 dB loss at 6.4 Gbps
• 8 levels of programmable equalization
• Operates up to 10 Gbps with 30” FR4 traces
• Operates up to 6.4 Gbps with 40” FR4 traces
• 0.175 UI residual deterministic jitter at 6.4
Gbps with 40” FR4 traces
• Single 2.5V or 3.3V power supply
• Supports AC or DC-Coupling with wide input
common-mode
• Low power consumption: 100 mW Typ at 2.5V
• Small 3 mm x 4 mm 14-pin WSON package
• > 8 kV HBM ESD Rating
• -40 to 85°C operating temperature range
DESCRIPTION
The DS64EV100 programmable equalizer provides
compensation for transmission medium losses and
reduces the medium-induced deterministic jitter for
NRZ data channel. The DS64EV100 is optimized for
operation up to 10 Gbps for both cables and FR4
traces. The equalizer channel has eight levels of
input equalization that can be programmed by three
control pins.
The equalizer supports both AC and DC-coupled data
paths for long run length data patterns such as
PRBS-31, and balanced codes such as 8b/10b. The
device uses differential current-mode logic (CML)
inputs and outputs. The DS64EV100 is available in a
3 mm x 4 mm 14-pin leadless WSON package.
Power is supplied from either a 2.5V or 3.3V supply.
Simplified Application Diagram
Tx
ASIC/FPGA
High Speed
I/O
Rx
DS64EV100
OUT
IN
Switch Fabric Card
Line Card
Tx
ASIC/FPGA
High Speed
I/O
Rx
DS64EV100
OUT
IN
Backplane/Cable
Sub-system
1
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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