TMS320R2811_11 Datasheet, PDF (98/154 Pages) Texas Instruments – Digital Signal Processors

X1/XCLKIN
SYSCLKOUT
Write to PLLCR
Electrical Specifications
XCLKIN*2
XCLKIN/2
XCLKIN*4
(Current CPU
Frequency)
(CPU Frequency While PLL is Stabilizing
With the Desired Frequency. This Period
(PLL Lock-up Time, tp) is
131 072 XCLKIN Cycles Long.)
(Changed CPU Frequency)
Figure 6−10. Effect of Writing Into PLLCR Register
June 2004 − Revised June 2006
SPRS257C
99