TMS320R2811_11 Datasheet, PDF (29/154 Pages) Texas Instruments – Digital Signal Processors

Functional Overview
3 Functional Overview
TINT0
TINT1
XINT13
G
P
I
GPIO Pins ^O
M
U
X
XNMI
CPU-Timer 0
CPU-Timer 1
CPU-Timer 2
TINT2
PIE
(96 interrupts)†
External Interrupt
Control
(XINT1/2/13, XNMI)
SCIA/SCIB FIFO
SPI
FIFO
McBSP FIFO
eCAN
EVA/EVB
Memory Bus
INT14
INT[12:1]
INT13
NMI
C28x CPU
16 Channels
12-Bit ADC
XRS
X1/XCLKIN
X2
XF_XPLLDIS
System Control
(Oscillator and PLL
+
Peripheral Clocking
+
Low-Power
Modes
+
WatchDog)
RS
CLKIN
Memory Bus
Peripheral Bus
Real-Time JTAG
External
Interface
(XINTF)‡
Control
Address(19)
Data(16)
M0 SARAM
1K x 16
M1 SARAM
1K x 16
L0 SARAM
4K x 16
L1 SARAM
4K x 16
L2 SARAM
1K X 16
L3 SARAM
1K X 16
H0 SARAM
8K × 16
Boot ROM
4K × 16
† _{45 of the possible 96 interrupts are used on the devices.}
‡ _{XINTF is available on the R2812 devices only.}
Figure 3−1. Functional Block Diagram
30 SPRS257C
June 2004 − Revised June 2006