TMS320C6455 Datasheet, PDF (97/116 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

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PCI HOST ACCESS
HEX ADDRESS OFFSET
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
0x40
0x44
0x48 - 0xFF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TMS320C6455 Fixed-Point Digital Signal Processor
SPRS276 – MAY 2005
Table 6-22. PCI Peripheral Registers (continued)
DSP ACCESS
HEX ADDRESS RANGE
02C0 0110
02C0 0114
02C0 0118
02C0 011C
02C0 0120
02C0 0124
02C0 0128
02C0 012C
02C0 0130
02C0 0134
02C0 0138
02C0 013C
02C0 0140
02C0 0144
02C0 0148 - 02C0 015C
02C0 0160
02C0 0164
02C0 0168
02C0 016C
02C0 0170 - 02C0 017C
02C0 0180
02C0 0184
02C0 0188 - 02C0 019C
02C0 01A0 - 02C0 01AC
02C0 01B0 - 02C0 01BC
02C0 01C0
02C0 01C4
02C0 01C8
02C0 01CC
02C0 01D0
02C0 01D4
02C0 01D8 - 02C0 01DC
02C0 01E0
02C0 01E4
ACRONYM
PCI HOST ACCESS
REGISTER NAME
DSP ACCESS
REGISTER NAME
Base Address 0
PCIIF Base Address 0 Mask
Base Address 1
PCIIF Base Address 1 Mask
Base Address 2
PCIIF Base Address 2 Mask
Base Address 3
PCIIF Base Address 3 Mask
Base Address 4
PCIIF Base Address 4 Mask
Base Address 5
PCIIF Base Address 5 Mask
Reserved
Reserved
Subsystem ID/Subsystem
Vendor ID
PCIIF Subsystem Vendor
ID/Subsystem ID Mirror
Reserved
Reserved
Capabilities Pointer
PCIIF Capabilities Pointer
Mirror
Reserved
Reserved
Max Latency/Min
Grant/Interrupt Pin/Interrupt
Line
PCIIF Max Latency/Min
Grant/Interrupt Pin/Interrupt
Line Mirror
Power Management Capabili- Power Management Capabili-
ties
ties Mirror
Power Management Con-
trol/Status
Power Management Con-
trol/Status Mirror
Reserved
Reserved
PCIIF Power Management
D0 State Control
PCIIF Power Management
D1 State Control
PCIIF Power Management
D2 State Control
PCIIF Power Management
D3 State Control
-
Reserved
-
PCIIF Slave Control
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Slave Base Address Trans-
lation Register 0
-
Slave Base Address Trans-
lation Register 1
-
Slave Base Address Trans-
lation Register 2
-
Slave Base Address Trans-
lation Register 3
-
Slave Base Address Trans-
lation Register 4
-
Slave Base Address Trans-
lation Register 5
-
Reserved
-
PCIIF Base Address Regis-
ter 0 Mirror
-
PCIIF Base Address Regis-
ter 1 Mirror
C6455 Peripheral Information and Electrical Specifications
97