TMS320C6455 Datasheet, PDF (75/116 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

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TMS320C6455 Fixed-Point Digital Signal Processor
SPRS276 – MAY 2005
+3.3 V
EMI filter
C1
10 µF
C2
0.1 µF
(See NOTES)
PLLV1
CLKIN1
PLLREF
PLLOUT
PLLEN (TBD BIT)
SYSREFCLK1
(C64x + MegaModule)
PREDIV
PLLM
1
0
DIVIDER1
/3
DIVIDER2
/6
SYSCLK1^(A)
SYSCLK2^(B)
AECLKIN (EMIF Clock Input)
DIVIDER3
/x
DIVIDER4
/y
SYSCLK3^(C)
SYSCLK4
(Emulation and Trace)
10
EMIFA
AECLKINSEL
(AEA[15] pin)
ECLKOUT
A. EDMA, Chip infrastructure, CFG, and VCP2, TCP2, EMIFA, DDR2 EMIF, and RapidIO Peripherals
B. PCI, EMAC/MDIO, HPI, UTOPIA, McBSP, GPIO, TIMER, I2C, PLL1 Controller, and Powersaver
C. EMIFA
(For the PLL Options, CLKMODE Pins Setup, and PLL Clock Frequency Ranges, see the “TMS320C6455 PLL Multiply Factor Options,
Clock Frequency Ranges, and Typical Lock Time” table.)
NOTES: Place all PLL external components (C1, C2, and the EMI Filter) as close to the C6000tDSP device as possible. For the best
performance, TI recommends that all the PLL external components be on a single side of the board without jumpers, swirches, or
components other than the ones shown.
For reduced PLL jitter, maximize the spacing between switching signals and the PLL external components (C1, C2, and the EMI Filter).
The 3.3-V supply for the EMI filter must be from the same 3.3-V power plane supplying the I/O voltage, D_VDD.
EMI filter manufacturer Murata part number ACF451832-333, -223, −153, −103. Panasonic part number EXCCET193U.
Figure 6-2. External PLL1 Circuitry for Either PLL1 Multiply Modes or x1 (Bypass) Mode
C6455 Peripheral Information and Electrical Specifications
75