MSP430FE42X2 Datasheet, PDF (9/48 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430FE42x2
MIXED SIGNAL MICROCONTROLLER
SLAS616 − JULY 2008
special function registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
that are not allocated to a functional purpose are not physically present in the device. Simple software access
is provided with this arrangement.
interrupt enable 1 and 2
Address
7
6
5
4
3
0h
UTXIE0
URXIE0
ACCVIE
NMIIE
rw–0
rw–0
rw–0
rw–0
2
1
0
OFIE
WDTIE
rw–0
rw–0
WDTIE:
OFIE:
NMIIE:
ACCVIE:
URXIE0:
UTXIE0:
Watchdog timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer
is configured in interval timer mode.
Oscillator-fault-interrupt enable
Nonmaskable-interrupt enable
Flash access violation interrupt enable
USART0: UART and SPI receive-interrupt enable
USART0: UART and SPI transmit-interrupt enable
Address
7
6
5
4
3
2
1
0
1h
BTIE
rw-0
BTIE:
Basic Timer1 interrupt enable
interrupt flag register 1 and 2
Address
7
6
5
4
3
02h
UTXIFG0 URXIFG0
NMIIFG
rw–1
rw–0
rw–0
2
1
0
OFIFG
WDTIFG
rw–1
rw–(0)
WDTIFG:
OFIFG:
NMIIFG:
URXIFG0:
UTXIFG0:
Set on watchdog timer overflow (in watchdog mode) or security key violation. Reset on V_CC
power up or a reset condition at the RST/NMI pin in reset mode.
Flag set on oscillator fault
Set via RST/NMI pin
USART0: UART and SPI receive flag
USART0: UART and SPI transmit flag
Address
7
6
5
4
3
2
1
0
3h
BTIFG
rw-0
BTIFG:
Basic Timer1 interrupt flag
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