DRV103UG4 Datasheet, PDF (9/24 Pages) Burr-Brown (TI) – PWM LOW-SIDE DRIVER (1.5A and 3A) for Solenoids, Coils, Valves, Heaters, and Lamps

The DRV103’s adjustable PWM output frequency allows it
to be optimized for driving virtually any type of load.
ADJUSTABLE DUTY CYCLE (PWM Mode)
The DRV103’s externally adjustable duty cycle provides an
accurate means of controlling power delivered to a load.
Duty cycle can be set over a range of at least 10% to 90%
with an external resistor, analog voltage, or the voltage
output of a D/A converter. A low duty cycle results in
reduced power dissipation in the load. This keeps the DRV103
and the load cooler, resulting in increased reliability for both
devices.
Resistor Controlled Duty Cycle
Duty cycle is easily programmed by connecting a resistor
(R_PWM) between the Duty Cycle Adjust pin (pin 1) and
ground. High resistor values correspond to high duty cycles.
Table III provides resistor values for typical duty cycles.
Resistor values for additional duty cycles can be obtained
from Figure 5. For reference purposes, the equation for
calculating R_PWM is included in Figure 5.
DUTY CYCLE
(%)
5
10
20
30
40
50
60
70
80
90
95
5kHz
374k
402k
475k
549k
619k
681k
750k
825k
887k
953k
1M
R_PWM (Nearest 1% Values)
25kHz
100kHz
75k
80.6k
95.3k
110k
124k
137k
150k
165k
182k
196k
200k
16.9k
19.1k
22.6k
26.1k
29.4k
33.2k
37.4k
40.2k
44.2k
47.5k
49.9k
TABLE III. Duty Cycle Adjust Resistance.
DUTY CYCLE vs R_PWM
1M
5kHz
100k
25kHz
100kHz
10k
0
20
40
60
80
100
Duty Cycle (%)
FIGURE 5. Using a Resistor to Program Duty Cycle.
At 25kHz: R_PWM (kΩ) = 67.46 + 1.41 • %DC.
A 100pF capacitor in parallel with R_PWM is recommended
when switching a high load current to maintain a clean
output switching waveform, as shown in Figure 6.
R_PWM
only on
Pin 1
With
100pF in
Parallel with
R_PWM
Time (10µs)
FIGURE 6. Output Waveform at High Load Current.
Voltage Controlled Duty Cycle
Duty cycle can also be programmed by an analog voltage,
V_PWM. With V_PWM ≈ 3.56V, duty cycle is about 90%.
Decreasing this voltage results in decreased duty cycles.
Table IV provides V_PWM values for typical duty cycles. The
“Duty Cycle vs Voltage” typical performance curve for
additional duty cycles is shown in Figure 7.
100
90
80
70
60
50
40
30
20
10
0
1
DUTY CYCLE AND DUTY CYCLE ERROR
vs VOLTAGE
2
3
V_PWM (V)
2
1.5
1
0.5
0
–0.5
–1
–1.5
–2
4
FIGURE 7. Using a Voltage to Program Duty Cycle.
At V_S = 24V and F = 25kHz: V_PWM = 1.25 +
0.026 • %DC.
DUTY CYLE
(%)
5
10
20
40
60
80
90
95
V_PWM
(V)
1.344
1.518
1.763
2.283
2.788
3.311
3.561
3.705
TABLE IV. Duty Cycle Adjust Voltage.
DRV103
9
SBVS029A