DRV103UG4 Datasheet, PDF (11/24 Pages) Burr-Brown (TI) – PWM LOW-SIDE DRIVER (1.5A and 3A) for Solenoids, Coils, Valves, Heaters, and Lamps

PACKAGE MOUNTING
Figure 12 provides recommended PCB layouts for both the
SO-8 (U) and the PowerPAD™ SO-8 (H) packages. Al-
though the metal pad of the PowerPAD™ SO-8 (H) package
is electrically connected to ground (pin 4), no current should
flow in this pad. Do NOT use the exposed metal pad as a
power ground connection or erratic operation will result. For
lowest overall thermal resistance, it is best to solder the
PowerPAD™ directly to a circuit board, as illustrated in
Figure 13. Increasing the “heat sink” copper area improves
heat dissipation. Figure 14 shows typical junction-to-ambi-
ent thermal resistance as a function of the PC board copper
area.
150 (ref)
C-C
215 (ref)
95 x 95
DRV103(H)
Package
153 273
158 277
60 (ref)
50 nom
18
22
FIGURE 12. Recommended PCB Layout.
Signal Trace
DRV103 Die
Pad-to-Board
Solder
Copper Traces
Copper Pad
Thermal Vias
FIGURE 13. PowerPAD Heat Transfer.
THERMAL RESISTANCE vs
CIRCUIT BOARD COPPER AREA
80
DRV103 (H)
Power PAD
70
Surface-Mount Package
1oz. copper
60
50
40
30
0
1
2
3
4
5
Copper Area (inches²)
FIGURE 14. Heat Sink Thermal Resistance vs Circuit Board
Copper Area.
POWER DISSIPATION
DRV103 power dissipation depends on power supply, signal,
and load conditions. Power dissipation (P_D) is equal to the
product of output current times the voltage across the conduct-
ing DMOS transistor times the duty cycle. Using the lowest
possible duty cycle necessary to assure the required hold force
can minimize power dissipation in both the load and in the
DRV103. For low current, the output DMOS transistor on-
resistance is 0.5Ω, increasing to 0.6Ω at high output current.
At very high oscillator frequencies, the energy in the DRV103’s
linear rise and fall times can become significant and cause an
increase in P_D.
Application Bulletin SBFA002 at www.ti.com, explains how to
calculate or measure power dissipation with unusual signals
and loads.
THERMAL PROTECTION
Power dissipated in the DRV103 will cause its internal junction
temperature to rise. The DRV103 has an on-chip thermal
shutdown circuitry that protects the IC from damage. The
thermal protection circuitry disables the output when the junc-
tion temperature reaches approximately +160°C, allowing the
device to cool. When the junction temperature cools to approxi-
mately +140°C, the output circuitry is again enabled. Depend-
ing on load and signal conditions, the thermal protection circuit
may cycle on and off. This limits the dissipation of the driver
but may have an undesirable effect on the load.
Any tendency to activate the thermal protection circuit indi-
cates excessive power dissipation or an inadequate heat sink.
For reliable operation, junction temperature should be limited
to +125°C, maximum. To estimate the margin of safety in a
complete design (including heat sink), increase the ambient
temperature until the thermal protection is triggered. Use
worst-case load and signal conditions. For good reliability,
thermal protection should trigger more than 40°C above the
maximum expected ambient condition of your application.
This produces a junction temperature of 125°C at the maxi-
mum expected ambient condition.
DRV103
11
SBVS029A