CDC2509C Datasheet, PDF (9/12 Pages) Texas Instruments – 3.3-V PHASE-LOCK LOOP CLOCK DRIVER

CDC2509C
3.3-V PHASE-LOCK LOOP CLOCK DRIVER
TYPICAL CHARACTERISTICS
SCAS620 – DECEMBER 1998
CDC2509C
JITTER
vs
CLOCK FREQUENCY
400
VCC = 3.3 V
350
C(LY) = C(LF) = 30 pF
TA = 25°C
See Notes A and B
300
250
200
150
Peak to Peak
100
Cycle to Cycle
50
0
35 45 55 65 75 85 95 105 115 125
fc – Clock Frequency – MHz
Figure 9
ANALOG SUPPLY CURRENT
vs
CLOCK FREQUENCY
16
AVCC = VCC = 3.465 V
14 Bias = 0/3 V
C(LY) = 30 pf
12 ^{C(LF) = 0}
TA = 25°C
See Notes A and B
10
8
6
4
2
0
10 30 50 70 90 110 130 150
fc – Clock Frequency – MHz
Figure 11
NOTES: A. C(LY) = Lumped capacitive load at Y
B. C(LF) = Lumped feedback capacitance at FBIN
CDC2509A
JITTER
vs
CLOCK FREQUENCY
700
VCC = 3.3 V
600
C(LY) = C(LF) = 30 pF
TA = 25°C
See Notes A and B
500
400
Peak to Peak
300
200
Cycle to Cycle
100
0
35 45 55 65 75 85 95 105 115 125
fc – Clock Frequency – MHz
Figure 10
SUPPLY CURRENT
vs
CLOCK FREQUENCY
300
AVCC = VCC = 3.465 V
Bias = 0/3 V
250 C(LY) = 30 pf
C(LF) = 0
TA = 25°C
200 ^{See Notes A and B}
150
100
50
0
10 30 50 70 90 110 130 150
fc – Clock Frequency – MHz
Figure 12
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