TLC320AC01C Datasheet, PDF (88/90 Pages) Texas Instruments – Single-Supply Analog Interface Circuit

FN/S-PQCC-J**
20-PIN SHOWN
0.048 (1,22)
0.042 (1,07)
× 45°
4
E E1
8
Appendix E
Mechanical Data
PLASTIC J-LEADED CHIP CARRIER
D
D1
3
1
19
0.180 (4,57) MAX
0.120 (3,05) MAX
0.020 (0,51) MIN
18
D3 /E ₃
D2 /E2
14
9
13
0.050 (1,27) TYP
JEDEC
OUTLINE
NO. OF
PINS**
D/E
MIN
MAX
D1/E1
MIN
MAX
D2 /E2
MIN
MAX
D3 /E3
TYP
MO-047AA
20
0.385
(9,78)
0.395
(10,03)
0.350
(8,89)
0.356
(9,04)
0.290
(7,34)
0.330
(8,38)
0.200
(5,08)
MO-047AB
28
0.485
0.495
0.450
0.456
0.390
0.430
0.300
(12,32) (12,57) (11,43) (11,58) (9,91)
(10,92) (7,62)
MO-047AC
44
0.685
(17,40)
0.695
(17,65)
0.650
0.656
(16,51) (16,66)
0.590
(14,99)
0.630
(16,00)
0.500
(12,70)
MO-047AD
52
0.785
(19,94)
0.795
(20,19)
0.750 0.756
(19,05) (19,20)
0.690
(17,53)
0.730
(18,54)
0.600
(15,24)
MO-047AE
68
0.985
(25,02)
0.995
(25,27)
0.950
0.956
0.890
(24,13) (24,28) (22,61)
0.930
(23,62)
0.800
(20,32)
MO-047AF
84
1.185
(30,10)
1.195
(30,35)
1.150
1.158
1.090
(29,21) (29,41) (27,69)
1.130
(28,70)
1.000
(25,40)
4040005/A–07/93
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Dimensions D1 and E1 do not include mold flash or protrusion. Protrusion shall not exceed 0.010 (0,25)
on any side.
D. All dimensions conform to JEDEC Specification MO-047.
E. Maximum deviation from coplanarity is 0.004 (0,10).
E–1