TLC320AC01C Datasheet, PDF (37/90 Pages) Texas Instruments – Single-Supply Analog Interface Circuit

The power-up and reset conditions are as shown below.
DS03 DS02 DS01 DS00
00
01
In the read mode, eight bits are read but the 4 LSBs are repeated as the 4 MSBs.
2.20.7 Register 6 (Digital Configuration Register)
The following command loads the digital configuration register with the individual bit functions described
below.
DS15 DS14 DS13 DS12 DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
Control Bits R/W 0
01
1
0
X
X
** **
**
ADC and DAC conversion free run
1
Inactive
0
FSD output disable
Enable
16-Bit mode, ignore primary LSBs
Normal operation
1
0
1
0
Force secondary communications
1
Normal operation
0
Software reset
1
(upon reset, this bit is automatically reset to 0)
Inactive reset
0
Software power-down active (automatically reset to 0
1
after PWR DWN is cycled high to low and back to high)
Power-down function external
0
(uses PWR DWN)
The default value of DS07 – DS00 is 0 as shown below.
DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
0
0
00
00
00
2.20.8 Register 7 (Frame-Sync Delay Register)
The following command contains the frame-sync delay (FSD) register address and loads DS07
(MSB) – DS00 into the FSD register. The data byte (DS01 – DS00) determines the number of SCLKs
between FS and the delayed frame-sync signal, FSD. The minimum data value for this register is
decimal 18.
DS15 DS14 DS13 DS12 DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
Control Bits R/W 0
01
1
1
Register Data
The default value of DS07 – DS00 is 0 as shown below.
DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
0
0
00
00
00
When using a slave device, register 7 must be the last register programmed.
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