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AM1810 Datasheet, PDF (83/259 Pages) Texas Instruments – AM1810 ARM Microprocessor For PROFIBUS | |||
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5.7.1.5 AINTC Memory Map
BYTE ADDRESS
0xFFFE E000
0xFFFE E004
0xFFFE E008 - 0xFFFE E00F
0xFFFE E010
0xFFFE E014 - 0xFFFE E01B
0xFFFE E01C
0xFFFE E020
0xFFFE E024
0xFFFE E028
0xFFFE E02C
0xFFFE E030
0xFFFE E034
0xFFFE E038
0xFFFE E03C - 0xFFFE E04F
0xFFFE E050
0xFFFE E054
0xFFFE E058
0xFFFE E05C - 0xFFFE E07F
0xFFFE E080
0xFFFE E084
0xFFFE E088 - 0xFFFE E1FF
0xFFFE E200
0xFFFE E204
0xFFFE E208
0xFFFE E20C
0xFFFE E210- 0xFFFE E27F
0xFFFE E280
0xFFFE E284
0xFFFE E288
0xFFFE E28C
0xFFFE E290 - 0xFFFE E2FF
0xFFFE E300
0xFFFE E304
0xFFFE E308
0xFFFE E30C
0xFFFE E310 - 0xFFFE E37F
0xFFFE E380
0xFFFE E384
0xFFFE E388
0xFFFE E38C
0xFFFE E390 - 0xFFFE E3FF
AM1810
SPRS709B â NOVEMBER 2010 â REVISED DECEMBER 2011
Table 5-7. AINTC Memory Map
ACRONYM
REV
CR
-
GER
-
GNLR
SISR
SICR
EISR
EICR
-
HIEISR
HIDISR
-
VBR
VSR
VNR
-
GPIR
GPVR
-
SRSR[0]
SRSR[1]
SRSR[2]
SRSR[3]
-
SECR[0]
SECR[1]
SECR[2]
SECR[3]
-
ESR[0]
ESR[1]
ESR[2]
ESR[3]
-
ECR[0]
ECR[1]
ECR[2]
ECR[3]
-
DESCRIPTION
Revision Register
Control Register
Reserved
Global Enable Register
Reserved
Global Nesting Level Register
System Interrupt Status Indexed Set Register
System Interrupt Status Indexed Clear Register
System Interrupt Enable Indexed Set Register
System Interrupt Enable Indexed Clear Register
Reserved
Host Interrupt Enable Indexed Set Register
Host Interrupt Enable Indexed Clear Register
Reserved
Vector Base Register
Vector Size Register
Vector Null Register
Reserved
Global Prioritized Index Register
Global Prioritized Vector Register
Reserved
System Interrupt Status Raw / Set Registers
Reserved
System Interrupt Status Enabled / Clear Registers
Reserved
System Interrupt Enable Set Registers
Reserved
System Interrupt Enable Clear Registers
Reserved
Copyright © 2010â2011, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
83
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