TMS320C6711 Datasheet, PDF (82/129 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSORS

TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS088L − FEBRUARY 1999 − REVISED MAY 2004
SYNCHRONOUS-BURST MEMORY TIMING (CONTINUED)
ECLKOUT
CEx
BE[3:0]
EA[21:2]
ED[31:0]
1
2
BE1
4
1
3
BE2
BE3
BE4
5
EA
6
7
Q1
Q2
Q3
Q4
ARE/SDCAS/SSADS^†
8
8
9
9
AOE/SDRAS/SSOE^†
AWE/SDWE/SSWE^†
† _{ARE/SDCAS/SSADS, AOE/SDRAS/SSOE, and AWE/SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM}
accesses.
Figure 32. SBSRAM Read Timing
ECLKOUT
CEx
BE[3:0]
EA[21:2]
ED[31:0]
ARE/SDCAS/SSADS^†
AOE/SDRAS/SSOE^†
AWE/SDWE/SSWE^†
1
2
BE1
4
10
Q1
8
BE2
BE3
5
EA
Q2
Q3
8
1
3
BE4
11
Q4
12
12
† _{ARE/SDCAS/SSADS, AOE/SDRAS/SSOE, and AWE/SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM}
accesses.
Figure 33. SBSRAM Write Timing
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