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THS12082 Datasheet, PDF (8/38 Pages) Texas Instruments – 12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS | |||
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THS12082
12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
SLAS271 â MAY 2000
timing specifications (AVDD = BVDD = DVDD = 5 V, VREFP = 3.5 V, VREFM = 1.5 V, CL < 30 pF
PARAMETER
TEST CONDITIONS
MIN TYP MAX
td(DATA_AV) Delay time
5
td(o)
Delay time
5
td(pipe)
Latency
5
UNIT
ns
ns
CONV
CLK
timing specification of the single conversion mode
tc
tw1
tdA
t2
td(DATA_AV)
PARAMETER
Clock cycle of the internal clock oscillator
Pulse duration, CONVST
Aperture time
Time between consecutive start of single conversion
Delay time, DATA_AV becomes active for the trigger
level condition: TRIG0 = 1, TRIG1 = 1
TEST CONDITIONS
1 analog input
2 analog inputs
1 analog input, TL = 1
2 analog inputs, TL = 2
1 analog input, TL = 4
2 analog inputs, TL = 4
1 analog input, TL = 8
2 analog inputs, TL = 8
1 analog input, TL = 14
2 analog inputs, TL = 12
MIN
119
1.5Ãtc
2Ãtc
3Ãtc
TYP
MAX UNIT
125
131 ns
ns
1
ns
ns
6Ãtc
ns
7Ãtc
3Ãt2 +6Ãtc
ns
t2 +7Ãtc
7Ãt2 +6Ãtc
ns
3Ãt2 +7Ãtc
13Ãt2 +6Ãtc
ns
5Ãt2 +7Ãtc
8
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