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SLVU405 Datasheet, PDF (8/14 Pages) Texas Instruments – TPS7A30-49EVM-567
Board Layout
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Table 1. Thermal Resistance, qJA, and Maximum Power Dissipation
Board
High-K
Package
DGN
qJA
55.09°C/W
Max Dissipation
(TA = 25°C)
1.83 W
Max Dissipation
(TA = 70°C)
1.08 W
TPS7A30-49EVM-567
DGN
46.11°C/W
2.16 W
1.19 W
The thermal resistance for the TPS7A30-49EVM-567, qJA, is the measured value for this particular layout
scheme. The maximum power dissipation is proportional to the volume of copper volume connected to the
package. Note that these measurements were made with only one LDO turned on.
7 Board Layout
TEXAS
INSTRUMENTS
TEXAS
INSTRUMENTS
Figure 6. Assembly Layer
8
TPS7A30-49EVM-567
Copyright © 2010, Texas Instruments Incorporated
SLVU405 – August 2010