DS92001 Datasheet, PDF (8/17 Pages) National Semiconductor (TI) – 3.3V B/LVDS-BLVDS Buffer

DS92001
SNLS147F – JUNE 2002 – REVISED APRIL 2013
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APPLICATION INFORMATION
The DS92001 can be used as a "stub-hider." In many systems, signals are distributed across backplanes, and
one of the limiting factors for system speed is the "stub length" or the distance between the transmission line and
the unterminated receivers on the individual cards. See Figure 10. Although it is generally recognized that this
distance should be as short as possible to maximize system performance, real-world packaging concerns and
PCB designs often make it difficult to make the stubs as short as the designer would like. The DS92001,
available in the WSON package, can improve system performance by allowing the receiver to be placed very
close to the main transmission line either on the backplane itself or very close to the connector on the card.
Longer traces to the LVDS receiver may be placed after the DS92001. This very small WSON package is a 75%
space savings over the SOIC package.
The DS92001 may also be used as a repeater as shown in Figure 11. The signal is recovered and redriven at full
strength down the following segment. The DS92001 may also be used as a level translator, as it accepts LVDS,
BLVDS, and LVPECL inputs.
POWER DECOUPLING RECOMMENDATIONS
Bypass capacitors must be used on power pins. Use high frequency ceramic (surface mount is recommended)
0.1μF and 0.01μF capacitors in parallel at the power supply pin with the smallest value capacitor closest to the
device supply pin. Additional scattered capacitors over the printed circuit board will improve decoupling. Multiple
vias should be used to connect the decoupling capacitors to the power planes. A 10μF (35V) or greater solid
tantalum capacitor should be connected at the power entry point on the printed circuit board between the supply
and ground.
PC BOARD CONSIDERATIONS
Use at least 4 PCB board layers (top to bottom): LVDS signals, ground, power, TTL signals.
Isolate TTL signals from LVDS signals, otherwise the TTL signals may couple onto the LVDS lines. It is best to
put TTL and LVDS signals on different layers which are isolated by a power/ground plane(s).
Keep drivers and receivers as close to the (LVDS port side) connectors as possible.
For PC board considerations for the WSON package, please refer to application note AN-1187 “Leadless
Leadframe Package” (Literature Number SNOA401). It is important to note that to optimize signal integrity
(minimize jitter and noise coupling), the WSON thermal land pad, which is a metal (normally copper) rectangular
region located under the package as seen in Figure 12, should be attached to ground and match the dimensions
of the exposed pad on the PCB (1:1 ratio).
Figure 12. WSON Thermal Land Pad and Pin Pads
DIFFERENTIAL TRACES
Use controlled impedance traces which match the differential impedance of your transmission medium (ie. cable)
and termination resistor. Run the differential pair trace lines as close together as possible as soon as they leave
the IC (stubs should be < 10mm long). This will help eliminate reflections and ensure noise is coupled as
common-mode. In fact, we have seen that differential signals which are 1mm apart radiate far less noise than
traces 3mm apart since magnetic field cancellation is much better with the closer traces. In addition, noise
induced on the differential lines is much more likely to appear as common-mode which is rejected by the
receiver.
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