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| DAC8550_15 Datasheet, PDF (8/28 Pages) Texas Instruments – 16-BIT, ULTRA-LOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER | |||
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DAC8550
SLAS476E â MARCH 2006 â REVISED MARCH 2012
www.ti.com
TYPICAL CHARACTERISTICS: VDD = 5 V (continued)
At TA = +25°C, unless otherwise noted.
1800
1600
1400
SUPPLY CURRENT
vs LOGIC INPUT VOLTAGE
TA = 25°C, SCL Input (all other inputs = GND)
VDD = VREF = 5.5V
FULL-SCALE SETTLING TIME: 5V RISING EDGE
Trigger Pulse 5V/div
1200
1000
800
600
400
200
0
0
1
2
3
4
5
VLOGIC (V)
Figure 11.
Rising Edge
1V/div
VDD = 5V
VREF = 4.096V
From Code: D000
To Code: FFFF
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 12.
FULL-SCALE SETTLING TIME: 5V FALLING EDGE
Trigger Pulse 5V/div
HALF-SCALE SETTLING TIME: 5V RISING EDGE
Trigger Pulse 5V/div
VDD = 5V
VREF = 4.096V
From Code: FFFF
To Code: 0000
Falling
Edge
1V/div
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 13.
HALF-SCALE SETTLING TIME: 5V FALLING EDGE
Trigger Pulse 5V/div
VDD = 5V
VREF = 4.096V
From Code: CFFF
To Code: 4000
Falling
Edge
1V/div
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 15.
Rising
Edge
1V/div
VDD = 5V
VREF = 4.096V
From Code: 4000
To Code: CFFF
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 14.
GLITCH ENERGY: 5V, 1LSB STEP, RISING EDGE
VDD = 5V
VREF = 4.096V
From Code: 7FFF
To Code: 8000
Glitch: 0.08nV-s
Time (400ns/div)
Figure 16.
8
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Product Folder Link(s): DAC8550
Copyright © 2006â2012, Texas Instruments Incorporated
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