DAC8550_15 Datasheet, PDF (17/28 Pages) Texas Instruments – 16-BIT, ULTRA-LOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER

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POWER-DOWN MODES
The DAC8550 supports four separate modes of
operation. These modes are programmable by setting
two bits (PD1 and PD0) in the control register.
Table 1 shows how the state of the bits corresponds
to the mode of operation of the device.
PD1
(DB17)
0
—
0
1
1
Table 1. Operating Modes
PD0
(DB16)
0
—
1
0
1
OPERATING MODE
Normal operation
Power-down modes
Output typically 1kΩ to GND
Output typically 100kΩ to GND
High-Z
When both bits are set to '0', the device works
normally with a typical current consumption of 200μA
at 5V. However, for the three power-down modes, the
supply current falls to 200nA at 5V (50nA at 3V). Not
only does the supply current fall, but the output stage
is also internally switched from the output of the
amplifier to a resistor network of known values. The
advantage with this configuration is that the output
DAC8550
SLAS476E – MARCH 2006 – REVISED MARCH 2012
impedance of the device is known while in power-
down mode. There are three different options. The
output is connected internally to GND through a 1kΩ
resistor, a 100kΩ resistor, or it is left open-circuited
(High-Z). The output stage is illustrated in Figure 49.
V_FB
Resistor
String
DAC
Amplifier
V_OUT
Power-Down
Circuitry
Resistor
Network
Figure 49. Output Stage During Power-Down
All analog circuitry is shut down when the power-
down mode is activated. However, the contents of the
DAC register are unaffected when in power-down.
The time to exit power-down is typically 2.5μs for V_DD
= 5V, and 5μs for V_DD = 3V. See the Typical
Characteristics for more information.
Copyright © 2006–2012, Texas Instruments Incorporated
Product Folder Link(s): DAC8550
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