English
Language : 

CD74HC40105 Datasheet, PDF (8/14 Pages) Texas Instruments – High Speed CMOS Logic 4-Bit x 16-Word FIFO Register
◁
CD74HC40105, CD74HCT40105
Switching Specifications Input tr, tf = 6ns
PARAMETER
TEST
SYMBOL CONDITIONS
HC TYPES
Propagation Delay
MR to DIR, DOR
SI to DIR
SO to DOR
SO to Qn
Propagation Delay/Ripple thru
Delay
SI to DOR
tPHL,
tPLH
tPHL,
tPLH
tPHL,
tPLH
tPHL,
tPLH
tPLH
CL = 50pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 50pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 50pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 50pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 50pF
Propagation Delay/Ripple thru
Delay
SO to DIR
tPLH CL = 50pF
Propagation Delay/Ripple thru
Delay
SI to Qn
tPLH CL = 50pF
Three-State Output Enable
OE to Qn
tPZH, tPZL CL = 50pF
Three-State Output Disabe
OE to Qn
Output Transition Time
tPHZ, tPLZ CL = 50pF
CL = 50pF
CL = 50pF
tTLH, tTHL CL = 50pF
Maximum SI, SO Frequency
Input Capacitance
Power Dissipation Capacitance
(Notes 4, 5)
fMAX
CIN
CPD
CL = 15pF
CL = 50pF
CL = 15pF
VCC
(V)
2
4.5
5
6
2
4.5
5
6
2
4.5
5
6
2
4.5
5
6
2
4.5
6
2
4.5
6
2
4.5
6
2
4.5
6
2
4.5
6
2
4.5
6
5
-
5
25oC
-40oC TO 85oC -55oC TO 125oC
MIN TYP MAX MIN MAX MIN MAX UNITS
-
- 175
-
220
-
265
ns
-
-
35
-
44
-
53
ns
-
15
-
-
-
-
-
ns
-
-
30
-
37
-
45
ns
-
- 210
-
265
-
315
ns
-
-
42
-
53
-
63
ns
-
18
-
-
-
-
-
ns
-
-
36
-
45
-
54
ns
-
- 210
-
265
-
315
ns
-
-
42
-
53
-
63
ns
-
18
-
-
-
-
-
ns
-
-
36
-
45
-
54
ns
-
- 400
-
500
-
600
ns
-
-
80
-
100
-
120
ns
-
35
-
-
-
-
-
ns
-
-
68
-
85
-
102
ns
-
- 2000 -
2500
-
3000 ns
-
- 400
-
500
-
600
ns
-
- 340
-
425
-
510
ns
-
- 2500 -
3125
-
3750 ns
-
- 500
-
625
-
750
ns
-
- 425
-
532
-
638
ns
-
- 1500 -
1900
-
2250 ns
-
- 300
-
380
-
450
ns
-
- 260
-
330
-
380
ns
-
- 150
-
190
-
225
ns
-
-
30
-
38
-
45
ns
-
-
26
-
33
-
38
ns
-
- 140
-
175
-
210
ns
-
-
28
-
35
-
42
ns
-
-
24
-
30
-
36
ns
-
-
75
-
95
-
110
ns
-
-
15
-
19
-
22
ns
-
-
13
-
16
-
19
ns
-
32
-
-
-
-
-
MHz
-
-
10
-
10
-
10
pF
-
83
-
-
-
-
-
pF
8
 ▷