 English |
|
|
|
|
|
|
|
| LM3S9B90 Datasheet, PDF (746/1185 Pages) Texas Instruments – Stellaris® LM3S9B90 Microcontroller | |||
| |||
| ◁ |
Inter-Integrated Circuit Sound (I2S) Interface
18.1 Block Diagram
Figure 18-1. I2S Block Diagram
I2S0TXMCLK
SysClk
System
AHB Bus
Interrupts/
DMA
I2S0RXMCLK
Registers
I2SCFG
I2SIC
I2SRIS
I2SMIS
I2SIM
I2STXCFG
Transmit FIFO
8 entry
I2STXFIFO
I2STXFIFOCFG
I2STXLIMIT
I2STXLEV
I2STXISM
BitClk/WdSel
Generation
Serial
Encoder
Transmit FIFO
I2SRXCFG
Receive FIFO
8 entry
I2SRXFIFO
I2SRXFIFOCFG
I2SRXLIMIT
I2SRXLEV
I2SRXISM
BitClk/WdSel
Generation
Serial
Decoder
Receive FIFO
I2S0TXSCK
I2S0TXWS
I2STXSD
I2S0RXSCK
I2S0RXWS
I2SRXSD
18.2
Signal Description
Table 18-1 on page 747 and Table 18-2 on page 747 list the external signals of the I2S module and
describe the function of each. The I2S module signals are alternate functions for some GPIO signals
and default to be GPIO signals at reset. The column in the table below titled "Pin Mux/Pin Assignment"
lists the possible GPIO pin placements for the I2S signals. The AFSEL bit in the GPIO Alternate
Function Select (GPIOAFSEL) register (page 349) should be set to choose the I2S function. The
number in parentheses is the encoding that must be programmed into the PMCn field in the GPIO
Port Control (GPIOPCTL) register (page 367) to assign the I2S signal to the specified GPIO port
pin. For more information on configuring GPIOs, see âGeneral-Purpose Input/Outputs
(GPIOs)â on page 325.
746
June 14, 2010
Texas Instruments-Advance Information
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese