LM3S9B90 Datasheet, PDF (208/1185 Pages) Texas Instruments – Stellaris® LM3S9B90 Microcontroller

Hibernation Module
7.3.3
7.3.4
7.3.5
Battery Management
The Hibernation module can be independently powered by a battery or an auxiliary power source.
The module can monitor the voltage level of the battery and detect when the voltage drops below
V_LOWBAT. When this happens, an interrupt can be generated. The module can also be configured
so that it does not go into Hibernate mode if the battery voltage drops below this threshold. Battery
voltage is not measured while in Hibernate mode.
Important: System level factors may affect the accuracy of the low battery detect circuit. The
designer should consider battery type, discharge characteristics, and a test load during
battery voltage measurements.
Note that the Hibernation module draws power from whichever source (V_BAT or V_DD) has the higher
voltage. Therefore, it is important to design the circuit to ensure that V_DD is higher that V_BAT under
nominal conditions or else the Hibernation module draws power from the battery even when V_DD is
available.
The Hibernation module can be configured to detect a low battery condition by setting the LOWBATEN
bit of the HIBCTL register. In this configuration, the LOWBAT bit of the Hibernation Raw Interrupt
Status (HIBRIS) register is set when the battery level is low. If the VABORT bit in the HIBCTL register
is also set, then the module is prevented from entering Hibernation mode when a low battery is
detected. The module can also be configured to generate an interrupt for the low-battery condition
(see “Interrupts and Status” on page 209).
Real-Time Clock
The Hibernation module includes a 32-bit counter that increments once per second with the proper
configuration (see “Hibernation Clock Source” on page 206). The 32.768-kHz clock signal, either
directly from the 32.768-kHz oscillator or from the 4.194304-MHz crystal divided by 128, is fed into
a predivider register that counts down the 32.768-kHz clock ticks to achieve a once per second
clock rate for the RTC. The rate can be adjusted to compensate for inaccuracies in the clock source
by using the predivider trim register, HIBRTCT. This register has a nominal value of 0x7FFF, and
is used for one second out of every 64 seconds to divide the input clock. This configuration allows
the software to make fine corrections to the clock rate by adjusting the predivider trim register up
or down from 0x7FFF. The predivider trim should be adjusted up from 0x7FFF in order to slow down
the RTC rate and down from 0x7FFF in order to speed up the RTC rate.
The Hibernation module includes two 32-bit match registers that are compared to the value of the
RTC counter. The match registers can be used to wake the processor from Hibernation mode or to
generate an interrupt to the processor if it is not in hibernation.
The RTC must be enabled with the RTCEN bit of the HIBCTL register. The value of the RTC can be
set at any time by writing to the HIBRTCLD register. The predivider trim can be adjusted by reading
and writing the HIBRTCT register. The predivider uses this register once every 64 seconds to adjust
the clock rate. The two match registers can be set by writing to the HIBRTCM0 and HIBRTCM1
registers. The RTC can be configured to generate interrupts by using the interrupt registers (see
“Interrupts and Status” on page 209).
Non-Volatile Memory
The Hibernation module contains 64 32-bit words of memory that are powered from the battery or
auxiliary power supply and therefore retained during hibernation. The processor software can save
state information in this memory prior to hibernation and recover the state upon waking. The
non-volatile memory can be accessed through the HIBDATA registers.
208
June 14, 2010
Texas Instruments-Advance Information