TMS320DM641_05 Datasheet, PDF (74/179 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processors

Device Configurations
2.4 Device Status Register Description
The device status register depicts the status of the device peripheral selection. For the actual register bit
names and their associated bit field descriptions, see Figure 2−5 and Table 2−6.
31
23
15
14
13
Reserved
R-0
Reserved
R-0
Reserved
R-0
12
11
MAC_EN
R-x
10
Reserved
R-0
9
Reserved
R-x
24
16
8
Reserved
R-0
7
Reserved
R-x
6
CLKMODE1
R-x
5
CLKMODE0
R-x
4
LENDIAN
R-x
Legend: R = Read only; R/W = Read/Write; -n = value after reset
3
BOOTMODE1
R-x
2
BOOTMODE0
R-x
1
0
AECLKINSEL1 AECLKINSEL0
R-x
R-x
Figure 2−5. Device Status Register (DEVSTAT) Description − 0x01B3 F004
BIT
31:12
11
10:7
6
5
4
3
2
Table 2−6. Device Status (DEVSTAT) Register Selection Bit Descriptions
NAME
DESCRIPTION
Reserved
Reserved. Read-only, writes have no effect.
MAC_EN
EMAC enable bit.
Shows the status of whether EMAC peripheral is enabled or disabled (default).
0 = EMAC is disabled, and the module is powered down (default).
1 = EMAC is enabled.
Reserved
Reserved. Read-only, writes have no effect.
CLKMODE1
CLKMODE0
Clock mode select bits
Shows the status of whether the CPU clock frequency equals the input clock frequency X1 (Bypass), x6,
or x12.
Clock mode select for CPU clock frequency (CLKMODE[1:0])
00 – Bypass (x1) (default mode)
01 − x6
10 − x12
11 − Reserved
For more details on the CLKMODE pins and the PLL multiply factors, see the Clock PLL section of this
data sheet.
LENDIAN
Device Endian mode (LEND)
Shows the status of whether the system is operating in Big Endian mode or Little Endian mode (default).
0 – System is operating in Big Endian mode
1 − System is operating in Little Endian mode (default)
BOOTMODE1
BOOTMODE0
Bootmode configuration bits
Shows the status of what device bootmode configuration is operational.
Bootmode [1:0]
00 – No boot (default mode)
01 − HPI [DM641 only]; Reserved [For DM640 device]
10 − Reserved
11 − EMIFA 8−bit ROM boot
74 SPRS222E
June 2003 − Revised October 2005